Home
last modified time | relevance | path

Searched full:rocket0 (Results 1 – 2 of 2) sorted by relevance

/Documentation/devicetree/bindings/riscv/
Dcpus.yaml42 - sifive,rocket0
58 - const: sifive,rocket0
146 compatible = "sifive,rocket0", "riscv";
163 compatible = "sifive,rocket0", "riscv";
/Documentation/devicetree/bindings/cpu/
Dcpu-topology.txt525 compatible = "sifive,rocket0", "riscv";
531 compatible = "sifive,rocket0", "riscv";
536 compatible = "sifive,rocket0", "riscv";
541 compatible = "sifive,rocket0", "riscv";