Searched full:routed (Results 1 – 25 of 93) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | sysfs-class-tee | 6 RPMB frames can be routed to the RPMB device via the
10 "kernel" means that the frames are routed via the RPMB
12 should be assumed that RPMB frames are routed via user
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| D | sysfs-bus-pci-drivers-ehci_hcd | 10 high-speed device is plugged in, the connection is routed
12 is plugged in, the connection is routed to the companion
17 connection to be routed to the companion controller.
19 file causes connections on that port to be routed to the
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6328.yaml | 275 /* USB link/activity routed to USB LED */
282 /* INET activity routed to INET LED */
289 /* EPHY0 link routed to EPHY0 LED */
296 /* EPHY1 link routed to EPHY1 LED */
303 /* EPHY2 link routed to EPHY2 LED */
310 /* EPHY3 link routed to EPHY3 LED */
333 /* USB/INET link/activity routed to USB LED */
340 /* EPHY0/1/2/3 link routed to EPHY0 LED */
363 /* USB link/act and INET act routed to USB LED */
370 /* EPHY3 link routed to EPHY0 LED */
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | fsl,cpm1-scc-qmc.yaml | 14 serial controller using the same TDM physical interface routed from TSA.
95 Channel assigned Tx time-slots within the Tx time-slots routed by the
101 Channel assigned Rx time-slots within the Rx time-slots routed by the
165 /* Ch16 : First 4 even TS from all routed from TSA */
174 /* Ch17 : First 4 odd TS from all routed from TSA */
183 /* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
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| D | fsl,qe-ucc-qmc.yaml | 14 serial controller using the same TDM physical interface routed from TSA.
107 Channel assigned Tx time-slots within the Tx time-slots routed by the
113 Channel assigned Rx time-slots within the Rx time-slots routed by the
169 /* Ch16 : First 4 even TS from all routed from TSA */
178 /* Ch17 : First 4 odd TS from all routed from TSA */
187 /* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
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| /Documentation/networking/devlink/ |
| D | devlink-trap.rst | 180 routed and they have a unicast destination IP and a multicast destination
185 routed and their destination IP is the loopback address (i.e., 127.0.0.0/8
190 routed and their source IP is multicast (i.e., 224.0.0.0/8 and ff::/8)
194 routed and their source IP is the loopback address (i.e., 127.0.0.0/8 and ::1/128)
198 routed and their IP header is corrupted: wrong checksum, wrong IP version
203 routed and their source IP is limited broadcast (i.e., 255.255.255.255/32)
207 be routed and their IPv6 multicast destination IP has a reserved scope
212 be routed and their IPv6 multicast destination IP has an interface-local scope
216 - Traps packets that should have been routed by the device, but were bigger
237 supposed to be routed. For example, IGMP queries can be flooded by the
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| D | mlxsw.rst | 97 routed from a disabled router interface (RIF). This can happen during
103 routed through a disabled router interface (RIF). This can happen during
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | sunplus,sp7021-pinctrl.yaml | 43 can be routed to any pins of fully pin-mux pins.
47 routed to GPIO 10 (3 - 1 + 8 = 10).
49 routed to GPIO 11 (4 - 1 + 8 = 11).
51 be routed to GPIO 12 (5 - 1 + 8 = 12).
53 be routed to GPIO 13 (6 - 1 + 8 = 13).
57 be routed to GPIO 27 (20 - 1 + 8 = 27).
59 will be routed to GPIO 28 (21 - 1 + 9 = 28).
62 routed to any of 64 'fully pin-mux' pins.
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | interrupts.txt | 13 which the interrupts are routed; see section 2 below for details.
20 interrupts are routed and contains a single phandle referring to the interrupt
116 interrupts routed to them, so that they can wakeup the SoC from suspend. These
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| D | riscv,cpu-intc.yaml | 13 to the core. Every interrupt is ultimately routed through a hart's HLIC
22 the HLIC, which are routed via the platform-level interrupt controller
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| D | microchip,lan966x-oic.yaml | 19 routed to the PCI interrupt.
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| D | brcm,bcm6345-l1-intc.txt | 13 peripheral IRQs to be routed to any CPU
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| /Documentation/devicetree/bindings/thermal/ |
| D | ti_soc_thermal.txt | 20 the talert signal is routed to;
23 line the tshut signal is routed to. The informed GPIO will
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| /Documentation/devicetree/bindings/clock/ |
| D | lpc1850-ccu.txt | 22 Shall contain a list of phandles for the base clocks routed
26 Shall contain a list of names for the base clock routed
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| D | lpc1850-creg-clk.txt | 9 The 32 kHz can also be routed to other peripherals to enable low
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| /Documentation/devicetree/bindings/net/ |
| D | icplus-ip101ag.txt | 17 interrupts are not routed outside the PHY in this mode.
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| /Documentation/admin-guide/media/ |
| D | imx.rst | 150 containing each virtual channel that are routed to CSIs or video
153 On i.MX6 solo/dual-lite, all four virtual channel buses are routed to
157 On i.MX6 Quad, virtual channel 0 is routed to IPU1-CSI0 (after selected
159 and IPU2-CSI0, respectively, and virtual channel 3 is routed to
194 When the direct source pad is routed to the ipuX_ic_prp entity, frames
198 When the direct source pad is routed to the ipuX_vdic entity, the VDIC
204 source pad is routed to a capture device node, with a node name of the
315 routed to a capture device node, with a node name of the format
330 pad from ipuX_ic_prp, and a single source pad. The source pad is routed
427 routed as follows: vc0 to the IPU1 CSI0 mux, vc1 directly to IPU1 CSI1,
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| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 20 output interrupt lines. An output interrupt line is routed to an interrupt
35 lines can also be routed to different processor sub-systems on DRA7xx as they
36 are routed through the Crossbar, a kind of interrupt router/multiplexer. The
39 NavSS. The interrupt lines from all these clusters are multiplexed and routed
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| /Documentation/devicetree/bindings/connector/ |
| D | usb-connector.yaml | 377 # Micro-USB connector with HS lines routed via controller (MUIC).
387 # USB-C connector attached to CC controller (s2mm005), HS lines routed
389 # DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
464 # with SS 2:1 MUX. HS lines routed to SoC, SS lines routed to the MUX and
503 # Micro-USB connector with HS lines routed via controller (MUIC) and MHL
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| /Documentation/userspace-api/media/dvb/ |
| D | net.rst | 23 virtual ``dvb?_?`` network interfaces, and will be controlled/routed via
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| /Documentation/devicetree/bindings/misc/ |
| D | ti,j721e-esm.yaml | 19 simplest configuration the signals are just routed to reset the SoC.
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio.txt | 159 For lines which are routed to on-board devices, this name should be
168 However, in the case of lines that are routed to a general purpose header
251 Some or all of the GPIOs provided by a GPIO controller may be routed to pins
296 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
297 pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's
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| /Documentation/devicetree/bindings/soc/aspeed/ |
| D | uart-routing.yaml | 25 physical serial I/O ports are routed.
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| /Documentation/sound/hd-audio/ |
| D | controls.rst | 71 When this enum control is enabled, the headphone output is routed
119 When this enum control is enabled, the headphone output is routed
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| /Documentation/networking/ |
| D | ipvs-sysctl.rst | 281 realservers so that they are routed as if they originate from the
282 director. Otherwise they are routed as if they are forwarded by the
286 of a packet originating from a director is routed differently to a
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