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/Documentation/devicetree/bindings/leds/
Drichtek,rt8515.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
16 RFS and RTS.
22 enf-gpios:
26 ent-gpios:
30 richtek,rfs-ohms:
35 for the property flash-max-microamp to work, the RFS resistor
39 richtek,rts-ohms:
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/Documentation/devicetree/bindings/serial/
Dserial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 where N is the port number (non-negative decimal integer) as printed on the
28 cts-gpios:
34 dcd-gpios:
40 dsr-gpios:
46 dtr-gpios:
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Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
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Dcirrus,clps711x-uart.txt4 - compatible: Should be "cirrus,ep7209-uart".
5 - reg: Address and length of the register set for the device.
6 - interrupts: Should contain UART TX and RX interrupt.
7 - clocks: Should contain UART core clock number.
8 - syscon: Phandle to SYSCON node, which contain UART control bits.
11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
23 compatible = "cirrus,ep7312-uart","cirrus,ep7209-uart";
28 cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
29 dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
30 dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
D8250_omap.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
13 - $ref: /schemas/serial/serial.yaml#
14 - $ref: /schemas/serial/rs485.yaml#
19 - enum:
20 - ti,am3352-uart
21 - ti,am4372-uart
22 - ti,am654-uart
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Dfsl-mxs-auart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: serial.yaml#
18 - const: fsl,imx23-auart
19 - const: alphascale,asm9260-auart
20 - items:
21 - enum:
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D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
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Datmel,at91-usart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Richard Genoud <richard.genoud@bootlin.com>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
20 - const: atmel,at91rm9200-dbgu
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/Documentation/devicetree/bindings/net/
Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
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/Documentation/devicetree/bindings/pinctrl/
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
21 uart1(rts), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
33 mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd),
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Dimg,pistachio-pinctrl.txt7 configured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs
8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
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/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dserial.txt4 - fsl,cpm1-smc-uart
5 - fsl,cpm2-smc-uart
6 - fsl,cpm1-scc-uart
7 - fsl,cpm2-scc-uart
8 - fsl,qe-uart
10 Modem control lines connected to GPIO controllers are listed in the gpios
11 property as described in booting-without-of.txt, section IX.1 in the following
14 CTS, RTS, DCD, DSR, DTR, and RI.
16 The gpios property is optional and can be left out when control lines are
23 compatible = "fsl,mpc8272-scc-uart",
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/Documentation/devicetree/bindings/gnss/
Dbrcm,bcm4751.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
11 - Linus Walleij <linus.walleij@linaro.org>
15 bus requires CTS/RTS support. The number of the capsule is more
20 - $ref: gnss-common.yaml#
21 - $ref: /schemas/serial/serial-peripheral-props.yaml#
26 - brcm,bcm4751
27 - brcm,bcm4752
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/Documentation/devicetree/bindings/firmware/
Dintel,ixp4xx-network-processing-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
24 - items:
25 - const: intel,ixp4xx-network-processing-engine
29 - description: NPE0 (NPE-A) register range
30 - description: NPE1 (NPE-B) register range
31 - description: NPE2 (NPE-C) register range
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/Documentation/devicetree/bindings/iio/addac/
Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
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/Documentation/driver-api/gpio/
Ddrivers-on-gpio.rst6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
25 up to three buttons by simply using GPIOs and no mouse port. You can cut the
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
31 off/on, for an actual PWM waveform, see pwm-gpio below.)
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/Documentation/firmware-guide/acpi/
Denumeration.rst1 .. SPDX-License-Identifier: GPL-2.0
13 that are accessed through memory-mapped registers.
15 In order to support this and re-use the existing drivers as much as
18 - Devices that have no bus connector resource are represented as
21 - Devices behind real busses where there is a connector resource
34 This means that when ACPI_HANDLE(dev) returns non-NULL the device was
36 device-specific configuration. There is an example of this below.
43 for the device and add supported ACPI IDs. If this same IP-block is used on
44 some other non-ACPI platform, the driver might work out of the box or needs
64 configuring GPIOs it can get its ACPI handle and extract this information
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