Searched full:sample (Results 1 – 25 of 317) sorted by relevance
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,adm1275.yaml | 37 adi,volt-curr-sample-average:
43 adi,power-sample-average:
60 adi,volt-curr-sample-average:
62 adi,power-sample-average: false
72 adi,volt-curr-sample-average:
74 adi,power-sample-average: false
84 adi,volt-curr-sample-average:
86 adi,power-sample-average:
100 adi,volt-curr-sample-average:
102 adi,power-sample-average:
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| /Documentation/devicetree/bindings/clock/ |
| D | amlogic,axg-audio-clkc.yaml | 56 - description: slave sample clock N0 provided by external components
57 - description: slave sample clock N1 provided by external components
58 - description: slave sample clock N2 provided by external components
59 - description: slave sample clock N3 provided by external components
60 - description: slave sample clock N4 provided by external components
61 - description: slave sample clock N5 provided by external components
62 - description: slave sample clock N6 provided by external components
63 - description: slave sample clock N7 provided by external components
64 - description: slave sample clock N8 provided by external components
65 - description: slave sample clock N9 provided by external components
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | atmel,sama5d2-adc.yaml | 34 atmel,min-sample-rate-hz:
37 atmel,max-sample-rate-hz:
71 - atmel,min-sample-rate-hz
72 - atmel,max-sample-rate-hz
89 atmel,min-sample-rate-hz = <200000>;
90 atmel,max-sample-rate-hz = <20000000>;
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| /Documentation/sound/soc/ |
| D | dai.rst | 30 usually varies depending on the sample rate and the master system clock
31 (SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
33 different sample rates.
45 MSB is transmitted sample size BCLKs before LRC transition.
53 receive the audio data. Bit clock usually varies depending on sample rate
54 while sync runs at the sample rate. PCM also supports Time Division
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| D | clocking.rst | 15 audio playback and capture sample rates.
30 runs at exactly the sample rate (LRC = Rate).
43 audio clocks as it usually gives more accurate sample rates than the CPU.
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| /Documentation/translations/zh_CN/iio/ |
| D | iio_configfs.rst | 48 * drivers/iio/trigger/iio-trig-sample.c
74 .name = "trig-sample",
81 每种触发器类型在/config/iio/triggers下都有其自己的目录。加载iio-trig-sample
82 模块将创建“trig-sample”触发器类型目录/config/iio/triggers/trig-sample.
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| /Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.yaml | 60 the card interface unit clock. If "ciu-drive" and "ciu-sample" are
70 - const: ciu-sample
73 "ciu-drive" and "ciu-sample" are supported. They are used
74 to control the clock phases, "ciu-sample" is required for tuning
80 rockchip,default-sample-phase:
86 The default phase to set "ciu-sample" at probing,
120 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | hisilicon,hi3798cv200-dw-mshc.yaml | 28 - description: card input sample phase clock
35 - const: ciu-sample
45 - description: Sample DLL register offset in CRG address space
84 clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
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| /Documentation/iio/ |
| D | iio_configfs.rst | 42 * drivers/iio/trigger/iio-trig-sample.c
43 * sample kernel module implementing a new trigger type
69 .name = "trig-sample",
77 iio-trig-sample module will create 'trig-sample' trigger type directory
78 /config/iio/triggers/trig-sample.
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| /Documentation/userspace-api/media/drivers/ |
| D | max2175.rst | 41 sample clock (sck), sampling rate etc. These multiple settings are
52 - This configures FM band with a sample rate of 0.512 million
55 - This configures VHF band with a sample rate of 2.048 million
60 - This configures FM band with a sample rate of 0.7441875 million
63 - This configures FM band with a sample rate of 0.372 million
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-sdr-ru12le.rst | 10 Real unsigned 12-bit little endian sample
16 This format contains sequence of real number samples. Each sample is
17 represented as a 12 bit unsigned little endian number. Sample is stored
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| /Documentation/devicetree/bindings/sound/ |
| D | dai-params.yaml | 21 convert-sample-format:
22 description: Audio sample format used by DAI
32 description: Audio sample rate used by DAI
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| D | fsl,imx-asrc.yaml | 7 title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller
10 The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of
82 description: The mutual sample rate used by DPCM Back Ends
86 description: The mutual sample width used by DPCM Back Ends
107 Defines a mutual sample format used by DPCM Back Ends, which can
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| D | fsl,audmix.yaml | 19 from two interfaces into a single sample. Before mixing, audio samples of
31 Mixing operation is independent of audio sample rate but the two audio
32 input streams must have same audio sample rate with same number of channels
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| D | nvidia,tegra186-asrc.yaml | 10 Asynchronous Sample Rate Converter (ASRC) converts the sampling frequency
12 wide range of sample rate ratios (freq_in/freq_out) from 1:24 to 24:1.
16 It supports sample rate conversions in the range of 8 to 192 kHz and
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| D | adi,axi-spdif-tx.txt | 8 the clock used as the sampling rate reference clock sample.
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
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| /Documentation/devicetree/bindings/spi/ |
| D | snps,dw-apb-ssi.yaml | 143 rx-sample-delay-ns:
146 Default value of the rx-sample-delay-ns property.
150 SPI Rx sample delay offset, unit is nanoseconds.
151 The delay from the default sample time before the actual sample of the
193 rx-sample-delay-ns = <3>;
197 rx-sample-delay-ns = <7>;
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| /Documentation/devicetree/bindings/iio/resolver/ |
| D | adi,ad2s1210.yaml | 24 toggling the SAMPLE line and can then be read directly. In configuration mode,
88 sample-gpios:
90 GPIO connected to the /SAMPLE pin. As the line needs to be low to trigger
91 a sample, it should be configured as GPIO_ACTIVE_LOW.
141 - sample-gpios
172 sample-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
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| /Documentation/hwmon/ |
| D | ltc4245.rst | 96 If you have NOT configured the driver to sample all GPIO pins as analog
98 created. The driver will sample the GPIO pin that is currently connected to the
101 If you have configured the driver to sample all GPIO pins as analog voltages,
106 The LTC4245 chip can be configured to sample all GPIO pins with two methods:
111 The default mode of operation is to sample a single GPIO pin.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-ad9739a | 9 the DAC sample rate. This has the effect of
12 the DAC sample rate, thus improving the output
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| /Documentation/devicetree/bindings/media/ |
| D | st,stm32-dcmipp.yaml | 49 pclk-sample: true
54 - pclk-sample
84 pclk-sample = <0>;
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| /Documentation/networking/ |
| D | net_dim.rst | 24 iteration of the algorithm, it analyses a given sample of the data, compares it
25 to the previous sample and if required, it can decide to change some of the
26 interrupt moderation configuration fields. The data sample is composed of data
41 #. Calculates new data sample.
42 #. Compares it to previous sample.
97 :c:type:`struct dim_sample <dim_sample>` describes a data sample,
98 which will be compared to the data sample stored in :c:type:`struct dim <dim>`
100 step. The sample should include bytes, packets and interrupts, measured by
153 /* Initiate data sample struct with current data */
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| /Documentation/sound/cards/ |
| D | audiophile-usb.rst | 47 * sample depth of 16 or 24 bits
48 * sample rate from 8kHz to 96kHz
49 * Two interfaces can't use different sample depths at the same time.
79 to synchronize the device to an external sample clock
84 synchronization error (for instance sound played at an odd sample rate)
116 This approach has the advantage to let the driver automatically switch from sample
154 * playing an ac3 sample file to the Do port::
180 * the sample depth
181 * the sample rate
216 where "test_S16_LE.raw" was in fact a little-endian sample file.
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| /Documentation/dev-tools/ |
| D | kfence.rst | 37 The most important parameter is KFENCE's sample interval, which can be set via
39 sample interval determines the frequency with which heap allocations will be
44 The sample interval controls a timer that sets up KFENCE allocations. By
45 default, to keep the real sample interval predictable, the normal timer also
49 idle systems, at the risk of unpredictable sample intervals. The default is
54 since it currently causes very unpredictable sample intervals.
56 By default KFENCE will only sample 1 heap allocation within each sample
57 interval. *Burst mode* allows to sample successive heap allocations, where the
59 denotes the *additional* successive allocations within a sample interval;
61 attempted through KFENCE for each sample interval.
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | mt9m111.txt | 18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to
33 pclk-sample = <1>;
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