Searched full:sdclk (Results 1 – 2 of 2) sorted by relevance
92 cdns,phy-dll-delay-sdclk:94 Value of the delay introduced on the sdclk output for all modes except100 cdns,phy-dll-delay-sdclk-hsmmc:102 Value of the delay introduced on the sdclk output for HS200, HS400 and155 cdns,phy-dll-delay-sdclk = <0>;
232 clocks = <&sdclk 0>, <&axi_clk 0>;274 clocks = <&sdclk 0>;