Searched +full:self +full:- +full:power (Results 1 – 25 of 57) sorted by relevance
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| /Documentation/devicetree/bindings/usb/ |
| D | usb251xb.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
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| D | maxim,max33359.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim TCPCI Type-C PD controller
10 - Badhri Jagan Sridharan <badhri@google.com>
12 description: Maxim TCPCI Type-C PD controller
17 - maxim,max33359
27 $ref: ../connector/usb-connector.yaml#
32 - compatible
33 - reg
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| D | qcom,pmic-typec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/qcom,pmic-typec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC based USB Type-C block
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
13 Qualcomm PMIC Type-C block
18 - enum:
19 - qcom,pmi632-typec
20 - qcom,pm8150b-typec
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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| D | nvidia,tegra30-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The EMC interfaces with the off-chip SDRAM to service the request stream
16 sent from Memory Controller. The EMC also has various performance-affecting
23 const: nvidia,tegra30-emc
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| /Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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| /Documentation/devicetree/bindings/mfd/ |
| D | x-powers,axp152.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/x-powers,axp152.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: X-Powers AXP PMIC
10 - Chen-Yu Tsai <wens@csie.org>
13 - if:
18 - x-powers,axp152
19 - x-powers,axp202
20 - x-powers,axp209
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| /Documentation/devicetree/bindings/fsi/ |
| D | ibm,p9-sbefifo.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/ibm,p9-sbefifo.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IBM FSI-attached SBEFIFO engine
10 - Eddie James <eajames@linux.ibm.com>
14 POWER processor Self Boot Engine (SBE). This node will always be a child
20 - ibm,p9-sbefifo
21 - ibm,odyssey-sbefifo
25 - description: FSI slave address
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| /Documentation/devicetree/bindings/powerpc/4xx/ |
| D | cpm.txt | 1 PPC4xx Clock Power Management (CPM) node
4 - compatible : compatible list, currently only "ibm,cpm"
5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
9 - er-offset : All 4xx SoCs with a CPM controller have
15 er-offset = <1>.
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr3-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
23 max-freq:
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| D | jedec,lpddr2-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr2-timings
16 max-freq:
19 Maximum DDR clock frequency for the speed-bin, in Hz.
21 min-freq:
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| D | jedec,lpddr3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - samsung,K3QF2F20DB
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| D | jedec,lpddr2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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| /Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
117 Display Power Management (Signaling)
183 Northbridge Power State
204 Power Controller
207 Power Gate Finite State Machine
210 Panel Self Refresh
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-cpu-debug.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
18 external debug module is mainly used for two modes: self-hosted debug and
21 module provides sample-based profiling extension, which can be used to sample
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| /Documentation/devicetree/bindings/hwmon/ |
| D | pwm-fan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwmon/pwm-fan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
11 - Guenter Roeck <linux@roeck-us.net>
15 const: pwm-fan
17 cooling-levels:
19 $ref: /schemas/types.yaml#/definitions/uint32-array
23 fan-supply:
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| /Documentation/devicetree/bindings/soc/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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| /Documentation/virt/geniezone/ |
| D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 GenieZone hypervisor (gzvm) is a type-I hypervisor that supports various virtual
10 machine types and provides security features such as TEE-like scenarios and
15 kernel for vCPU scheduling, memory management, inter-VM communication and virtio
25 - vCPU Management
28 CPUs. It requires Linux kernel in host VM for vCPU scheduling and VM power
31 - Memory Management
38 - Virtual Platform
41 guest VM. The platform supports various architecture-defined devices, such as
44 - Inter-VM Communication
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
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| /Documentation/arch/powerpc/ |
| D | pmu-ebb.rst | 8 The full specification is available in Power ISA v2.07:
10 https://www.power.org/documentation/power-isa-version-2-07/
13 document describes the API for configuring the Power PMU to generate EBBs,
18 -----------
27 ----------
30 EBBs can only sensibly be used by programs for self-monitoring.
44 user process. This means once an EBB event is scheduled on the PMU, no non-EBB
61 ---------------------
67 attributes - this is so that they interoperate correctly with the rest of the
88 ---------------------
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,brcmstb.txt | 2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
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| /Documentation/sound/cards/ |
| D | emu10k1-jack.rst | 9 power of this hardware.
12 - Lee Revell, 2005.03.30
25 fairly self explanatory - select Duplex, then for capture and playback select
30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S
36 sb-live-mixer.rst (or audigy-mixer.rst).
|
| /Documentation/bpf/ |
| D | ringbuf.rst | 12 ----------
18 - more efficient memory utilization by sharing ring buffer across CPUs;
19 - preserving ordering of events that happen sequentially in time, even across
23 Both are a result of a choice to have per-CPU perf ring buffer. Both can be
25 problem could technically be solved for perf buffer with some in-kernel
30 ------------------
56 The approach chosen has an advantage of re-using existing BPF map
62 combined with ``ARRAY_OF_MAPS`` and ``HASH_OF_MAPS`` map-in-maps to implement
70 the size of ring buffer and has to be a power of 2 value.
75 - variable-length records;
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| /Documentation/devicetree/bindings/input/ |
| D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
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| /Documentation/admin-guide/pm/ |
| D | sleep-states.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 Sleep states are global low-power states of the entire system in which user
28 Suspend-to-Idle
29 ---------------
31 This is a generic, pure software, light-weight variant of system suspend (also
34 I/O devices into low-power states (possibly lower-power than available in the
38 The system is woken up from this state by in-band interrupts, so theoretically
43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the
50 -------
54 operating state is lost (the system core logic retains power), so the system can
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