Searched full:sequencing (Results 1 – 25 of 30) sorted by relevance
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 34 and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
39 The flexible sequencing structure consists of two hardware enable inputs
40 (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
41 Each master sequencing timer is programmable through its configuration
43 source (SW). When enabled/disabled, the master sequencing timer generates
44 eight sequencing events on different time periods called slots. The time
55 clock are set into following state at the sequencing event that
59 the sequencing event.
61 low power mode at the sequencing event.
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| D | rohm,bd9576-pmic.yaml | 15 The IC provides 6 power outputs with configurable sequencing and safety
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| /Documentation/driver-api/ |
| D | pwrseq.rst | 5 Power Sequencing API
16 The intention is to allow consumers to obtain a power sequencing handle
24 The power sequencing API uses a number of terms specific to the subsystem:
94 .. kernel-doc:: drivers/power/sequencing/core.c
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| /Documentation/i2c/busses/ |
| D | i2c-ali1535.rst | 27 Additionally, the sequencing of the SMBus transactions has been modified to
28 be more consistent with the sequencing recommended by the manufacturer and
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| /Documentation/devicetree/bindings/power/ |
| D | fsl,imx-gpcv2.yaml | 77 power-up sequencing to ensure reset propagation into devices located
90 power-up sequencing of the domain. The resets belong to devices
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| D | mediatek,power-controller.yaml | 98 power-up sequencing.
102 List of names of clocks, in order to match the power-up sequencing
109 In order to follow properly the power-up sequencing, the clocks must
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| D | fsl,imx-gpc.yaml | 89 power-up sequencing to ensure reset propagation into devices located
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| /Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,imx7ulp-pm.yaml | 13 The Multi-System Mode Controller (MSMC) is responsible for sequencing
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-max77620.txt | 64 - maxim,active-fps-power-up-slot: Sequencing event slot number on which
71 - maxim,active-fps-power-down-slot: Sequencing event slot number on which
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-edp.yaml | 27 provided anywhere on the DP AUX bus is the power sequencing timings.
33 information) to figure out other power sequencing timings.
35 eDP panels in general can have somewhat arbitrary power sequencing
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| D | raspberrypi,7inch-touchscreen.yaml | 17 - Atmel microcontroller on I2C for power sequencing the DSI bridge and
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| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx8mq-vpu-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the VPU peripherals
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| D | fsl,imx93-src.yaml | 60 during domain power-up sequencing to ensure reset
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| D | fsl,imx8mp-hsio-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the high-speed IO
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| D | fsl,imx8mp-hdmi-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the display pipeline
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| D | fsl,imx8mm-disp-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
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| D | fsl,imx8mn-disp-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
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| D | fsl,imx8mm-vpu-blk-ctrl.yaml | 14 the NoC and ensuring proper power sequencing of the VPU peripherals
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| D | fsl,imx8mp-media-blk-ctrl.yaml | 14 providing access to the NoC and ensuring proper power sequencing of the
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| /Documentation/devicetree/bindings/input/ |
| D | goodix,gt7375p.yaml | 15 power sequencing required.
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| /Documentation/devicetree/bindings/regulator/ |
| D | regulator-max77620.txt | 62 - maxim,active-fps-power-up-slot: Sequencing event slot number on which
69 - maxim,active-fps-power-down-slot: Sequencing event slot number on which
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| /Documentation/driver-api/nvdimm/ |
| D | firmware-activate.rst | 79 The last runtime activation failed due to a sequencing error of the
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| /Documentation/filesystems/xfs/ |
| D | xfs-delayed-logging-design.rst | 702 Delayed Logging: Checkpoint Sequencing
717 written directly into the log buffers. Hence some other method of sequencing
955 that is run as part of the checkpoint commit and log force sequencing. The code
961 sequencing also requires the same lock, list walk, and blocking mechanism to
964 These two sequencing operations can use the mechanism even though the
966 sequencing needs to wait until checkpoint contexts contain a commit LSN
968 sequencing needs to wait until previous checkpoint contexts are removed from
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| /Documentation/networking/ |
| D | napi.rst | 103 Drivers should not make assumptions about the exact sequencing
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| /Documentation/hwmon/ |
| D | it87.rst | 264 for AMD power sequencing. Therefore the chip will appear as IT8716F
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