Searched +full:shared +full:- +full:dma +full:- +full:pool (Results 1 – 25 of 26) sorted by relevance
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| /Documentation/devicetree/bindings/sound/ |
| D | google,cros-ec-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cheng-Yi Chiang <cychiang@chromium.org>
11 - Tzung-Bi Shih <tzungbi@kernel.org>
15 Embedded Controller (EC) and is controlled via a host-command
17 subnode of a cros-ec node.
18 (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml).
21 - $ref: dai-common.yaml#
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| D | mediatek,mt8188-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8188-afe
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See dtschema reserved-memory/shared-dma-pool.yaml for details.
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| D | mt8195-afe-pcm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8195-audio
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.txt for details.
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,k3-m4f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hari Nagalla <hnagalla@ti.com>
11 - Mathieu Poirier <mathieu.poirier@linaro.org>
20 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
25 - ti,am64-m4fss
27 power-domains:
30 "#address-cells":
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| D | st-rproc.txt | 1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and "pwr_reset"
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| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
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| D | ti,keystone-rproc.txt | 5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
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| D | ti,davinci-rproc.txt | 4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
27 the parent node's '#address-cells' and '#size-cells' values.
29 - reg-names: Should contain strings with the following names, each
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| /Documentation/devicetree/bindings/dma/ |
| D | marvell,mmp-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP DMA controller
10 - Duje Mihanović <duje.mihanovic@skole.hr>
13 Marvell MMP SoCs may have two types of DMA controllers, peripheral and audio.
18 - marvell,pdma-1.0
19 - marvell,adma-1.0
20 - marvell,pxa910-squ
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| /Documentation/core-api/ |
| D | swiotlb.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 DMA and swiotlb
7 swiotlb is a memory buffer allocator used by the Linux kernel DMA layer. It is
8 typically used when a device doing DMA can't directly access the target memory
10 the DMA layer calls swiotlb to allocate a temporary memory buffer that conforms
11 to the limitations. The DMA is done to/from this temporary memory buffer, and
17 the DMA layer of the DMA attributes of the devices they are managing, and use
18 the normal DMA map, unmap, and sync APIs when programming a device to do DMA.
19 These APIs use the device DMA attributes and kernel-wide settings to determine
20 if bounce buffering is necessary. If so, the DMA layer manages the allocation,
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| D | dma-api-howto.rst | 2 Dynamic DMA mapping Guide
9 This is a guide to device driver writers on how to use the DMA API
10 with example pseudo-code. For a concise description of the API, see
11 Documentation/core-api/dma-api.rst.
13 CPU and DMA addresses
16 There are several kinds of addresses involved in the DMA API, and it's
31 registers at an MMIO address, or if it performs DMA to read or write system
37 From a device's point of view, DMA uses the bus address space, but it may
39 supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU
40 so devices only need to use 32-bit DMA addresses.
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| /Documentation/devicetree/bindings/gpu/ |
| D | aspeed-gfx.txt | 4 - compatible
6 + aspeed,ast2500-gfx
7 + aspeed,ast2400-gfx
11 - reg: Physical base address and length of the GFX registers
13 - interrupts: interrupt number for the GFX device
15 - clocks: clock number used to generate the pixel clock
17 - resets: reset line that must be released to use the GFX device
19 - memory-region:
21 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
27 compatible = "aspeed,ast2500-gfx", "syscon";
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| /Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
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| D | intel,stratix10-svc.txt | 3 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
22 -------------------
26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
27 - method: smc or hvc
28 smc - Secure Monitor Call
29 hvc - Hypervisor Call
30 - memory-region:
32 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
36 -------
38 reserved-memory {
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| /Documentation/devicetree/bindings/dsp/ |
| D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
11 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 advanced pre- and post- audio processing.
20 - fsl,imx8qxp-dsp
21 - fsl,imx8qm-dsp
22 - fsl,imx8mp-dsp
23 - fsl,imx8ulp-dsp
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| /Documentation/admin-guide/sysctl/ |
| D | vm.rst | 13 ------------------------------------------------------------------------------
27 - admin_reserve_kbytes
28 - compact_memory
29 - compaction_proactiveness
30 - compact_unevictable_allowed
31 - dirty_background_bytes
32 - dirty_background_ratio
33 - dirty_bytes
34 - dirty_expire_centisecs
35 - dirty_ratio
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| /Documentation/networking/device_drivers/ethernet/marvell/ |
| D | octeontx2.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
12 - `Overview`_
13 - `Drivers`_
14 - `Basic packet flow`_
15 - `Devlink health reporters`_
16 - `Quality of service`_
23 PCI-compatible physical and virtual functions. Each functional block
31 - Network pool or buffer allocator (NPA)
32 - Network interface controller (NIX)
33 - Network parser CAM (NPC)
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| /Documentation/mm/ |
| D | hmm.rst | 5 Provide infrastructure and helpers to integrate non-conventional memory (device
21 CPU page-table mirroring works and the purpose of HMM in this context. The
24 leveraging the device DMA engine.
34 driver and regular application memory (private anonymous, shared memory, or
36 address space. I use shared address space to refer to the opposite situation:
52 complex data set needs to re-map all the pointer relations between each of its
69 are only doable with a shared address space. It is also more reasonable to use
70 a shared address space for all other patterns.
76 I/O buses cripple shared address spaces due to a few limitations. Most I/O
95 two-way cache coherency between CPU and device and allow all atomic operations the
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| /Documentation/devicetree/bindings/display/msm/ |
| D | gpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <robdclark@gmail.com>
14 # as a work-around:
20 - qcom,adreno
21 - amd,imageon
23 - compatible
28 - description: |
30 figure out the chip-id.
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| /Documentation/filesystems/ |
| D | proc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
24 1.1 Process-Specific Subdirectories
36 3 Per-Process Parameters
37 3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj - Adjust the oom-killer
39 3.2 /proc/<pid>/oom_score - Display current oom-killer score
40 3.3 /proc/<pid>/io - Display the IO accounting fields
41 3.4 /proc/<pid>/coredump_filter - Core dump filtering settings
42 3.5 /proc/<pid>/mountinfo - Information about mounts
44 3.7 /proc/<pid>/task/<tid>/children - Information about task children
45 3.8 /proc/<pid>/fdinfo/<fd> - Information about opened file
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| /Documentation/scsi/ |
| D | ChangeLog.megaraid_sas | 1 Release Date : Thu. Jun 19, 2014 17:00:00 PST 2014 -
2 (emaild-id:megaraidlinux@lsi.com)
7 Current Version : 06.803.02.00-rc1
8 Old Version : 06.803.01.00-rc1
14 -------------------------------------------------------------------------------
15 Release Date : Mon. Mar 10, 2014 17:00:00 PST 2014 -
16 (emaild-id:megaraidlinux@lsi.com)
20 Current Version : 06.803.01.00-rc1
21 Old Version : 06.700.06.00-rc1
24 3. Return leaked MPT frames to MPT command pool.
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| /Documentation/arch/x86/ |
| D | sgx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 * Privileged (ring-0) ENCLS functions orchestrate the construction of the
15 * Unprivileged (ring-3) ENCLU functions allow an application to enter and
38 with an enclave. It is contained in a BIOS-reserved region of physical memory.
49 ------------------
67 ----------------------
76 remain read-only. EPCM permissions may only impose additional restrictions on
88 -----------------------
97 .. kernel-doc:: arch/x86/kernel/cpu/sgx/ioctl.c
104 --------------------------
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| /Documentation/spi/ |
| D | spi-summary.rst | 5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
51 SPI is only one of the names used by such four-wire protocols, and
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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| /Documentation/sound/kernel-api/ |
| D | writing-an-alsa-driver.rst | 11 Architecture) <http://www.alsa-project.org/>`__ driver. The document
19 low-level driver implementation details. It only describes the standard
26 -------
56 --------------
60 sub-directories contain different modules and are dependent upon the
74 This directory and its sub-directories are for the ALSA sequencer. This
76 as snd-seq-midi, snd-seq-virmidi, etc. They are compiled only when
85 -----------------
88 to be exported to user-space, or included by several files in different
94 -----------------
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