Searched full:sibling (Results 1 – 25 of 39) sorted by relevance
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| /Documentation/devicetree/ |
| D | of_unittest.rst | 93 struct device_node *sibling;
98 considering only child and sibling pointers. There exists another pointer,
100 a particular level the child node and all the sibling nodes will have a parent
163 replaces the current child and turns it into its sibling. So, when the testcase
204 sibling compared to the earlier structure (Figure 2). After attaching first
206 (i.e. test-child0) to become a sibling and makes itself a child node,
225 node's parent to its sibling or attaches the previous sibling to the given
226 node's sibling, as appropriate. That is it :)
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| /Documentation/admin-guide/hw-vuln/ |
| D | core-scheduling.rst | 105 During a schedule() event on any sibling of a core, the highest priority task on
106 the sibling's core is picked and assigned to the sibling calling schedule(), if
107 the sibling has the task enqueued. For rest of the siblings in the core,
114 switch to the new task immediately. If an idle task is selected for a sibling,
115 then the sibling is considered to be in a `forced idle` state. I.e., it may
127 task. If a sibling does not have a trusted task to run, it will be forced idle
131 the sibling to force it into idle. This results in 4 cases which need to be
189 sibling. Such attacks are possible for any combination of sibling CPU modes
212 sibling hyperthreads from one another. Prototypes of mitigations have been posted
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| D | cross-thread-rsb.rst | 8 predictions vulnerability. When running in SMT mode and one sibling thread
9 transitions out of C0 state, the other sibling thread could use return target
10 predictions from the sibling thread that transitioned out of C0.
16 being consumed by the sibling thread.
52 used by RET predictions in the sibling thread following a 1T/2T switch. In
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| D | spectre.rst | 127 from the sibling thread, as level 1 cache and branch target buffer
129 program running on the sibling thread may influence its peer's BTB to
234 sibling hyperthread sharing a physical processor core on simultaneous
247 a sibling hardware thread sharing the same physical core.
258 sibling thread from controlling branch target buffer. In addition,
319 in the sibling hyperthread can be mitigated by the administrator,
545 sibling thread when the user program is running, and use IBPB to
583 To mitigate guest-to-guest attacks from sibling thread when SMT is
584 in use, an untrusted guest running in the sibling thread can have
650 sibling threads.
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| D | special-register-buffer-data-sampling.rst | 59 executed on another core or sibling thread using MDS techniques.
90 take longer to execute and do not impact performance of sibling logical
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| D | l1tf.rst | 100 the context which runs on the sibling Hyperthread of the same physical
206 sibling thread will also bring back its data into the L1D which makes it
223 If only a single guest or related guests run on sibling SMT threads on
227 Host memory is attackable, when one of the sibling SMT threads runs in
322 online a non-primary sibling is rejected
342 physical core two or more sibling threads are online.
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| D | l1d_flush.rst | 59 different processes which are concurrently executing on sibling threads of
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| D | srso.rst | 130 - potentially create and pin an additional workload on the sibling
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| /Documentation/arch/x86/ |
| D | mds.rst | 179 sibling threads are offline CPU buffer clearing is not required.
194 sibling after the store buffer got repartitioned and all entries are
195 available to the non idle sibling.
198 sibling has half of it available. The back from idle CPU could be then
199 speculatively exposed to contents of the sibling. The buffers are
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| D | microcode.rst | 119 the update is executed on one SMT thread of the core, the sibling
124 can result in unpredictable results if the SMT sibling thread happens to
131 executed by the other SMT sibling, can also result in similar,
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| /Documentation/ABI/testing/ |
| D | sysfs-class-leds-gt683r | 7 of one LED will update the mode of its two sibling devices as
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,versatile.yaml | 38 PCI host controller. Like the sibling board, it is done specifically
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| /Documentation/devicetree/bindings/usb/ |
| D | twlxxxx-usb.txt | 33 If a sibling node is compatible "ti,twl4030-bci", then it will find
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| /Documentation/devicetree/bindings/power/supply/ |
| D | twl4030-charger.yaml | 14 value in explicit configuration in device-tree. Rather if there is a sibling
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| /Documentation/driver-api/ |
| D | i2c.rst | 29 The System Management Bus (SMBus) is a sibling protocol. Most SMBus
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| /Documentation/maintainer/ |
| D | rebasing-and-merging.rst | 110 from lower-level subsystem trees and from others, either sibling trees or
135 Merging from sibling or upstream trees
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| /Documentation/i2c/ |
| D | i2c-topology.rst | 102 non-sibling muxes.
298 Two mux-locked sibling muxes
322 Two parent-locked sibling muxes
346 Mux-locked and parent-locked sibling muxes
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| /Documentation/translations/zh_CN/devicetree/ |
| D | of_unittest.rst | 70 struct device_node *sibling;
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| /Documentation/devicetree/bindings/pci/ |
| D | brcm,stb-pcie.yaml | 24 - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
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| /Documentation/translations/zh_CN/core-api/ |
| D | xarray.rst | 289 * - Sibling
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| /Documentation/core-api/ |
| D | folio_queue.rst | 39 sibling pointers in terminal segments should be NULL.
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| D | xarray.rst | 368 * - Sibling
484 reveal sibling entries; these should be skipped over by the caller.
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| /Documentation/filesystems/xfs/ |
| D | xfs-self-describing-metadata.rst | 52 understanding how things like cross linked block lists (e.g. sibling
162 sibling pointer lists). Hence we still need stateful checking in the main code
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| /Documentation/admin-guide/pm/ |
| D | intel_idle.rst | 227 have a performance impact on its sibling CPU. The IBRS mode will be turned off
231 help performance of a sibling CPU at the expense of a slightly higher wakeup
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| /Documentation/scheduler/ |
| D | sched-rt-group.rst | 160 Consider two sibling groups A and B; both have 50% bandwidth, but A's
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