Searched +full:software +full:- +full:generated (Results 1 – 25 of 104) sorted by relevance
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| /Documentation/devicetree/bindings/arm/firmware/ |
| D | sdei.txt | 1 * Software Delegated Exception Interface (SDEI) 4 ARM DEN 0054A ("Software Delegated Exception Interface") can be used by 5 Linux to receive notification of events such as those generated by 6 firmware-first error handling, or from an IRQ that has been promoted to 7 a firmware-assisted NMI. 15 r0 => 32-bit Function ID / return value 16 {r1 - r3} => Parameters 27 - compatible : should contain: 28 * "arm,sdei-1.0" : For implementations complying to SDEI version 1.x. 30 - method : The method of calling the SDEI firmware. Permitted [all …]
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| /Documentation/devicetree/bindings/misc/ |
| D | aspeed,ast2400-cvic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Jeffery <andrew@codeconstruct.com.au> 19 The AST2500 also supports a software generated interrupt. 24 - enum: 25 - aspeed,ast2400-cvic 26 - aspeed,ast2500-cvic 27 - const: aspeed,cvic [all …]
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| /Documentation/networking/ |
| D | timestamping.rst | 1 .. SPDX-License-Identifier: GPL-2.0 43 ------------------------------------------------------------- 59 ------------------------------------------------------------------- 72 ---------------------------------------------------------------------- 97 Timestamps may also be generated for reasons other than being 102 Request rx timestamps generated by the network adapter. 106 are generated just after a device driver hands a packet to the 110 Request tx timestamps generated by the network adapter. This flag 115 are generated in the device driver as close as possible, but always 130 a timestamp is generated at each layer. This allows for fine [all …]
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| /Documentation/security/keys/ |
| D | ecryptfs.rst | 6 file using a randomly generated File Encryption Key (FEK). 20 'ecryptfs-utils'. 25 authentication token in its payload with a FEKEK randomly generated by the 28 In order to avoid known-plaintext attacks, the datablob obtained through 34 required key can be securely generated by an Administrator and provided at boot 37 threats of malicious software, because it is available in clear form only at 42 keyctl add encrypted name "new ecryptfs key-type:master-key-name keylen" ring 44 keyctl update keyid "update key-type:master-key-name" 49 key-type:= 'trusted' | 'user' 72 $ mount -i -t ecryptfs -oecryptfs_sig=1000100010001000,\
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| /Documentation/infiniband/ |
| D | tag_matching.rst | 5 The MPI standard defines a set of rules, known as tag-matching, for matching 10 * User tag - wild card may be specified by the receiver 15 message envelopes may match, the pair that includes the earliest posted-send 16 and the earliest posted-receive is the pair that must be used to satisfy the 18 the order they are created, e.g., a later generated tag may be consumed, if 31 1. The Eager protocol- the complete message is sent when the send is 35 2. The Rendezvous Protocol - the sender sends the tag-matching header, 48 maintained by the hardware, with the software expected to shadow this list. 51 pre-posted receive for this arriving message, it is passed to the software and 54 specified receive buffer. This allows overlapping receive-side MPI tag [all …]
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,trace-buffer-extension.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Anshuman Khandual <anshuman.khandual@arm.com> 15 for storing trace generated on the CPU to memory. It is 16 accessed via CPU system registers. The software can verify 26 - const: arm,trace-buffer-extension 32 the arm,gic-v3 binding for details on describing a PPI partition. 36 - compatible [all …]
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| /Documentation/arch/arm/ |
| D | kernel_mode_neon.rst | 6 ------------- 10 '-march=armv7-a -mfpu=neon -mfloat-abi=softfp' 18 ------------ 25 non-preemptible section for reasons outlined below. 29 ------------------------- 41 enable the NEON/VFP unit explicitly so no exceptions are generated on first 50 ---------------------------- 67 -------------------- 68 Earlier versions of VFP (prior to version 3) rely on software support for things 69 like IEEE-754 compliant underflow handling etc. When the VFP unit needs such [all …]
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| /Documentation/admin-guide/ |
| D | hw_random.rst | 8 The hw_random framework is software that makes use of a 10 a Random Number Generator (RNG). The software has two parts: 12 sysfs support, plus a hardware-specific driver that plugs 16 should download the support software as well. Download the 17 latest version of the "rng-tools" package from: 19 https://github.com/nhorman/rng-tools 33 output if the hardware "has-data" flag is set, but nevertheless 34 a security-conscious person would run fitness tests on the 37 The rng-tools package uses such tests in "rngd", and lets you 44 "rng_available" attribute lists the hardware-specific drivers [all …]
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,spear3xx-shirq.txt | 11 registers. This makes software little complex. 16 For example, a 32-bit interrupt enable/disable config register can 20 - compatible: should be, either of 21 - "st,spear300-shirq" 22 - "st,spear310-shirq" 23 - "st,spear320-shirq" 24 - interrupt-controller: Identifies the node as an interrupt controller. 25 - #interrupt-cells: should be <1> which basically contains the offset 27 - reg: Base address and size of shirq registers. 28 - interrupts: The list of interrupts generated by the groups which are [all …]
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| D | msi.txt | 4 Message Signaled Interrupts (MSIs) are a class of interrupts generated by a 14 - The doorbell (the MMIO address written to). 16 Devices may be configured by software to write to arbitrary doorbells which 19 - The payload (the value written to the doorbell). 21 Devices may be configured to write an arbitrary payload chosen by software. 24 - Sideband information accompanying the write. 38 -------------------- 40 - msi-controller: Identifies the node as an MSI controller. 43 -------------------- 45 - #msi-cells: The number of cells in an msi-specifier, required if not zero. [all …]
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| /Documentation/sound/soc/ |
| D | clocking.rst | 10 ------------ 18 their speed can be altered by software (depending on the system use and to save 23 ---------- 32 Bit Clock can be generated as follows:- 34 - BCLK = MCLK / x, or 35 - BCLK = LRC * x, or 36 - BCLK = LRC * Channels * Word Size
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| /Documentation/security/tpm/ |
| D | tpm-security.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 12 ------------ 16 PTT, which is a software TPM running inside a software environment 22 ----------------------------------------------- 42 --------------------------- 68 ---------------- 77 --------------------------------------- 104 name, which is what is exported via sysfs so user-space can run the 112 -------------- 116 hands to user-space the name of the derived null seed key which can [all …]
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| /Documentation/userspace-api/gpio/ |
| D | gpio-v2-get-line-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 GPIO_V2_GET_LINE_IOCTL - Request a line or lines from the kernel. 37 :ref:`gpio-v2-line-request`. 41 as possible. e.g. gpio-v2-line-get-values-ioctl.rst will read all the 53 .. _gpio-v2-get-line-config-rules: 56 ------------------- 63 and the line is requested "as-is" to allow reading of the line value 69 If none are set then the line is assumed push-pull. 88 applies to both the values returned by gpio-v2-line-get-values-ioctl.rst and 89 the edges returned by gpio-v2-line-event-read.rst. If not [all …]
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| /Documentation/block/ |
| D | blk-mq.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Multi-Queue Block IO Queueing Mechanism (blk-mq) 7 The Multi-Queue Block IO Queueing Mechanism is an API to enable fast storage 16 ---------- 26 However, with the development of Solid State Drives and Non-Volatile Memories 30 in those devices' design, the multi-queue mechanism was introduced. 36 to different CPUs) wanted to perform block IO. Instead of this, the blk-mq API 42 --------- 45 for instance), blk-mq takes action: it will store and manage IO requests to 49 blk-mq has two group of queues: software staging queues and hardware dispatch [all …]
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| /Documentation/driver-api/rapidio/ |
| D | tsi721.rst | 2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge. 10 doorbells, inbound maintenance port-writes and RapidIO messaging. 23 - 'dbg_level' 24 - This parameter allows to control amount of debug information 25 generated by this device driver. This parameter is formed by set of 32 - 'dma_desc_per_channel' 33 - This parameter defines number of hardware buffer 37 - 'dma_txqueue_sz' 38 - DMA transactions queue size. Defines number of pending 42 - 'dma_sel' [all …]
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| D | rio_cm.rst | 10 Software Task Group (STG) between Texas Instruments, Prodrive Technologies, 19 This driver (RIO_CM) provides to user-space applications shared access to 23 messaging mailboxes in case of multi-packet message (up to 4KB) and 24 up to 64 mailboxes if single-packet messages (up to 256 B) are used. In addition 30 capability to large number of user-space processes by introducing socket-like 39 Following ioctl commands are available to user-space applications: 41 - RIO_CM_MPORT_GET_LIST: 46 - RIO_CM_EP_GET_LIST_SIZE: 49 - RIO_CM_EP_GET_LIST: 53 - RIO_CM_CHAN_CREATE: [all …]
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| /Documentation/arch/arm64/ |
| D | sme.rst | 19 ----------- 26 instructions and registers, and the Linux-specific system interfaces 31 the SME2 instructions and ZT0, and the Linux-specific system interfaces 39 following sections: software that needs to verify that those interfaces are 58 cpu-feature-registers.txt for details. 69 vectors from 0 to VL/8-1 stored in the same endianness invariant format as is 76 ------------------ 84 3. Sharing of streaming and non-streaming mode SVE state 85 --------------------------------------------------------- 88 between streaming and non-streaming modes. When switching between modes [all …]
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| /Documentation/devicetree/bindings/reset/ |
| D | reset.txt | 8 Hardware blocks typically receive a reset signal. This signal is generated by 10 reset consumer (the module being reset, or a module managing when a sub- 15 specifier - a list of DT cells that represents the reset signal within the 28 appropriate software access to the reset signals in order to manage the HW, 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 41 rst: reset-controller { 42 #reset-cells = <1>; 51 #reset-cells, then only the phandle portion of the pair will 55 reset-names: List of reset signal name strings sorted in the same order as 56 the resets property. Consumers drivers will use reset-names to [all …]
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| /Documentation/devicetree/bindings/gpio/ |
| D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 20 The Tegra186 GPIO controller allows software to set the IO direction of, 53 controller, are both extremely non-linear. The header file 54 <dt-bindings/gpio/tegra186-gpio.h> describes the port-level mapping. In 62 ports. Thus, the number of interrupt signals generated by a controller [all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | nxp,pca963x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 The NXP PCA963x are I2C-controlled LED drivers optimized for 19 - https://www.nxp.com/docs/en/data-sheet/PCA9632.pdf 20 - https://www.nxp.com/docs/en/data-sheet/PCA9633.pdf 21 - https://www.nxp.com/docs/en/data-sheet/PCA9634.pdf 22 - https://www.nxp.com/docs/en/data-sheet/PCA9635.pdf 27 - nxp,pca9632 [all …]
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| /Documentation/driver-api/media/drivers/ |
| D | ipu6.rst | 1 .. SPDX-License-Identifier: GPL-2.0 34 ------------------------ 51 --------- 53 IPU6 interrupt can be generated as MSI or INTA, interrupt will be triggered when 61 ------------------------------------- 76 ----------------- 80 Buttress with a copy of the SoC time, this counter maintains the up-to-date time 90 32-bit virtual address space. The IPU6 has MMU address translation hardware to 94 IPU6 driver. The IPU6 driver sets the level-1 page table base address to MMU 101 .. code-block:: none [all …]
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| /Documentation/arch/x86/ |
| D | tdx.rst | 1 .. SPDX-License-Identifier: GPL-2.0 18 CPU-attested software module called 'the TDX module' runs inside the new 22 TDX also leverages Intel Multi-Key Total Memory Encryption (MKTME) to 23 provide crypto-protection to the VMs. TDX reserves part of MKTME KeyIDs 32 TDX boot-time detection 33 ----------------------- 41 --------------------------------------- 59 Besides initializing the TDX module, a per-cpu initialization SEAMCALL 103 ------------------------------------------ 110 of memory regions (out of CMRs) as "TDX-usable" memory and pass those [all …]
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| D | iommu.rst | 7 - Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-dire… 8 - AMD: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_3_… 13 ----------- 21 - DMAR - Intel DMA Remapping table 22 - DRHD - Intel DMA Remapping Hardware Unit Definition 23 - RMRR - Intel Reserved Memory Region Reporting Structure 24 - IVRS - AMD I/O Virtualization Reporting Structure 25 - IVDB - AMD I/O Virtualization Definition Block 26 - IVHD - AMD I/O Virtualization Hardware Definition 41 The architecture defines an ACPI-compatible data structure called an I/O [all …]
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| /Documentation/networking/devlink/ |
| D | devlink-dpipe.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 ``devlink-dpipe`` provides a standardized way to provide visibility into the 21 should not be able to distinguish between the hardware vs. software 28 differences in the hardware and software models some processes cannot be 34 Level Path Compression trie (LPC-trie) in hardware. 45 The ``devlink-dpipe`` interface closes this gap. The hardware's pipeline is 50 configuration, but the ``devlink-dpipe`` interface uses it for visibility 52 ``devlink-dpipe`` should change according to the changes done by the 84 ``devlink-dpipe`` generally is not intended for configuration. The exception 96 ----- [all …]
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| /Documentation/input/joydev/ |
| D | joystick-api.rst | 1 .. _joystick-api: 7 :Author: Ragnar Hojland Espinosa <ragnar@macula.net> - 7 Aug 1998 18 driver now reports only any changes of its state. See joystick-api.txt, 65 ------------- 86 --------------- 89 generated the event. Note that they carry separate numeration (that 108 -------------- 110 For an axis, ``value`` is a signed integer between -32767 and +32767 141 ------------- 143 The time an event was generated is stored in ``js_event.time``. It's a time [all …]
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