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/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mt65xx.yaml4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
7 title: SPI Bus controller for MediaTek ARM SoCs
13 - $ref: /schemas/spi/spi-controller.yaml#
20 - mediatek,mt7629-spi
21 - mediatek,mt8365-spi
22 - const: mediatek,mt7622-spi
25 - mediatek,mt8516-spi
26 - const: mediatek,mt2712-spi
29 - mediatek,mt6779-spi
30 - mediatek,mt8186-spi
[all …]
Dbrcm,bcm63xx-spi.yaml4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-spi.yaml#
7 title: Broadcom BCM6348/BCM6358 SPI controller
13 Broadcom "Low Speed" SPI controller found in many older MIPS based Broadband
17 between the SPI transfers within the same SPI message. This can terminate the
18 transaction to some SPI devices prematurely. The issue can be worked around by
22 - $ref: spi-controller.yaml#
29 - brcm,bcm6368-spi
30 - brcm,bcm6362-spi
31 - brcm,bcm63268-spi
32 - const: brcm,bcm6358-spi
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Dbrcm,spi-bcm-qspi.yaml4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
7 title: Broadcom SPI controller
14 The Broadcom SPI controller is a SPI master found on various SOCs, including
15 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consists
17 MSPI : SPI master controller can read and write to a SPI slave device
18 BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
25 use SPI protocol.
28 - $ref: spi-controller.yaml#
36 - brcm,spi-bcm7425-qspi
37 - brcm,spi-bcm7429-qspi
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Dsnps,dw-apb-ssi.yaml4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
13 - $ref: spi-controller.yaml#
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
44 const: amd,pensando-elba-spi
55 - description: Generic DW SPI Controller
59 - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
62 - mscc,ocelot-spi
63 - mscc,jaguar2-spi
65 - description: Microchip Sparx5 SoC SPI Controller
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Dnvidia,tegra114-spi.yaml4 $id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml#
7 title: NVIDIA Tegra114 SPI controller
16 - const: nvidia,tegra114-spi
19 - nvidia,tegra210-spi
20 - nvidia,tegra124-spi
21 - const: nvidia,tegra114-spi
31 - description: SPI module clock
35 - const: spi
39 - description: SPI module reset
43 - const: spi
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Dspi-rockchip.yaml4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
7 title: Rockchip SPI Controller
10 The Rockchip SPI controller is used to interface with various devices such
11 as flash and display controllers using the SPI communication interface.
14 - $ref: spi-controller.yaml#
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
29 - rockchip,px30-spi
[all …]
Dallwinner,sun6i-a31-spi.yaml4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
7 title: Allwinner A31 SPI Controller
10 - $ref: spi-controller.yaml
19 - const: allwinner,sun50i-r329-spi
20 - const: allwinner,sun6i-a31-spi
21 - const: allwinner,sun8i-h3-spi
24 - allwinner,sun8i-r40-spi
25 - allwinner,sun50i-h6-spi
26 - allwinner,sun50i-h616-spi
27 - allwinner,suniv-f1c100s-spi
[all …]
Dspi-lantiq-ssc.txt1 Lantiq Synchronous Serial Controller (SSC) SPI master driver
4 - compatible: "lantiq,ase-spi", "lantiq,falcon-spi", "lantiq,xrx100-spi",
5 "intel,lgm-spi"
6 - #address-cells: see spi-bus.txt
7 - #size-cells: see spi-bus.txt
8 - reg: address and length of the spi master registers
18 - clocks: spi clock phandle
19 - num-cs: see spi-bus.txt, set to 8 if unset
25 spi: spi@e100800 {
26 compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
[all …]
Dspi-fsl-lpspi.yaml4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
15 - $ref: /schemas/spi/spi-controller.yaml#
21 - fsl,imx7ulp-spi
22 - fsl,imx8qxp-spi
25 - fsl,imx8ulp-spi
26 - fsl,imx93-spi
27 - fsl,imx95-spi
28 - const: fsl,imx7ulp-spi
37 - description: SoC SPI per clock
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Dingenic,spi.yaml4 $id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#
7 title: Ingenic SoCs SPI controller
14 - $ref: /schemas/spi/spi-controller.yaml#
20 - ingenic,jz4750-spi
21 - ingenic,jz4775-spi
22 - ingenic,jz4780-spi
23 - ingenic,x1000-spi
24 - ingenic,x2000-spi
27 - ingenic,jz4760-spi
28 - ingenic,jz4770-spi
[all …]
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
4 memory register, which acts as an SPI master device.
17 - compatible: should be "icpdas,lp8841-spi-rtc"
21 Requirements to SPI slave nodes:
25 - The spi slave node should claim the following flags which are
26 required by the spi controller.
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
31 - spi-cs-high: DS-1302 has active high chip select line. The master
34 - spi-lsb-first: DS-1302 requires least significant bit first
40 spi@901c {
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Dsamsung,spi.yaml4 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
7 title: Samsung S3C/S5P/Exynos SoC SPI controller
13 All the SPI controller nodes should be represented in the aliases node using
14 the following format 'spi{n}' where n is a unique number for the alias.
20 - google,gs101-spi
21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22 - samsung,s3c6410-spi
23 - samsung,s5pv210-spi # for S5PV210 and S5PC110
24 - samsung,exynos4210-spi
25 - samsung,exynos5433-spi
[all …]
Dspi-controller.yaml4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
7 title: SPI Controller Common Properties
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
49 cs-gpio with the optional spi-cs-high flag for SPI slaves.
56 spi-cs-high | - | H |
58 spi-cs-high | ACTIVE_HIGH | H |
60 spi-cs-high | ACTIVE_LOW | H | 2
[all …]
Dspi-sprd.txt1 Spreadtrum SPI Controller
4 - compatible: Should be "sprd,sc9860-spi".
5 - reg: Offset and length of SPI controller register space.
6 - interrupts: Should contain SPI interrupt.
8 "spi" for SPI clock,
9 "source" for SPI source (parent) clock,
10 "enable" for SPI module enable clock.
14 address on the SPI bus. Should be set to 1.
18 dma-names: Should contain names of the SPI used DMA channel.
19 dmas: Should contain DMA channels and DMA slave ids which the SPI used
[all …]
Drealtek,rtl-spi.yaml4 $id: http://devicetree.org/schemas/spi/realtek,rtl-spi.yaml#
7 title: Realtek RTL838x/RTL839x SPI controller
14 - $ref: spi-controller.yaml#
19 - realtek,rtl8380-spi
20 - realtek,rtl8382-spi
21 - realtek,rtl8391-spi
22 - realtek,rtl8392-spi
23 - realtek,rtl8393-spi
36 spi: spi@1200 {
37 compatible = "realtek,rtl8382-spi";
Dspi-sifive.yaml4 $id: http://devicetree.org/schemas/spi/spi-sifive.yaml#
7 title: SiFive SPI controller
15 - $ref: spi-controller.yaml#
21 - sifive,fu540-c000-spi
22 - sifive,fu740-c000-spi
26 Should be "sifive,<chip>-spi" and "sifive,spi<version>".
28 "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
30 for the SiFive SPI v0 IP block with no chip integration tweaks.
33 SPI RTL that corresponds to the IP block version numbers can be found here -
34 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
[all …]
Dspi-davinci.txt1 Davinci SPI controller device bindings
10 address on the SPI bus. Should be set to 1.
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
20 - ti,davinci-spi-intr-line: interrupt line used to connect the SPI
26 - clocks: spi clk phandle
35 and an args specifier containing the SPI device id
45 SPI slave nodes can contain the following properties.
[all …]
Daspeed,ast2600-fmc.yaml4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#
15 SPI) of the AST2400, AST2500 and AST2600 SOCs.
18 - $ref: spi-controller.yaml#
24 - aspeed,ast2600-spi
26 - aspeed,ast2500-spi
28 - aspeed,ast2400-spi
54 spi@1e620000 {
64 compatible = "jedec,spi-nor";
65 spi-max-frequency = <50000000>;
66 spi-rx-bus-width = <2>;
[all …]
Dcirrus,ep9301-spi.yaml4 $id: http://devicetree.org/schemas/spi/cirrus,ep9301-spi.yaml#
7 title: EP93xx SoC SPI controller
14 - $ref: spi-controller.yaml#
19 - const: cirrus,ep9301-spi
22 - cirrus,ep9302-spi
23 - cirrus,ep9307-spi
24 - cirrus,ep9312-spi
25 - cirrus,ep9315-spi
26 - const: cirrus,ep9301-spi
30 - description: SPI registers region
[all …]
/Documentation/devicetree/bindings/net/
Dqca,qca7000.txt4 be configured either as SPI or UART slave. This configuration is done by
7 (a) Ethernet over SPI
9 In order to use the QCA7000 as SPI device it must be defined as a child of a
10 SPI master in the device tree.
14 - reg : Should specify the SPI chip select
18 - spi-cpha : Must be set
19 - spi-cpol : Must be set
22 - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at.
24 are invalid. Missing the property will set the SPI
26 - qca,legacy-mode : Set the SPI data transfer of the QCA7000 to legacy mode.
[all …]
Dvertexcom-mse102x.yaml7 title: The Vertexcom MSE102x (SPI)
14 They can be connected either via RGMII, RMII or SPI to a host CPU.
16 In order to use a MSE102x chip as SPI device, it must be defined as
17 a child of an SPI master device in the device tree.
37 spi-cpha: true
39 spi-cpol: true
41 spi-max-frequency:
49 - spi-cpha
50 - spi-cpol
51 - spi-max-frequency
[all …]
/Documentation/devicetree/bindings/display/
Delgin,jg10309-01.yaml7 title: Elgin JG10309-01 SPI-controlled display
13 The Elgin JG10309-01 SPI-controlled display is used on the RV1108-Elgin-r1
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
26 spi-max-frequency:
29 spi-cpha: true
31 spi-cpol: true
36 - spi-cpha
37 - spi-cpol
43 spi {
50 spi-max-frequency = <24000000>;
[all …]
/Documentation/devicetree/bindings/tpm/
Dtcg,tpm_tis-spi.yaml4 $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
7 title: SPI-attached Trusted Platform Module conforming to TCG TIS specification
15 one of them being SPI. The standard is named:
25 - st,st33htpm-spi
26 - st,st33zp24-spi
27 - const: tcg,tpm_tis-spi
31 - $ref: /schemas/spi/spi-peripheral-props.yaml#
36 const: st,st33zp24-spi
39 spi-max-frequency:
50 spi {
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/Documentation/driver-api/
Dspi.rst1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
8 line, and a "Master In, Slave Out" (MISO) data line. SPI is a full
15 The SPI bus facilities listed here provide a generalized interface to
16 declare SPI busses and devices, manage them according to the standard
18 only "master" side interfaces are supported, where Linux talks to SPI
20 to support implementing SPI slaves would necessarily look different.)
26 SPI shift register (maximizing throughput). Such drivers bridge between
27 whatever bus they sit on (often the platform bus) and SPI, and expose
28 the SPI side of their device as a :c:type:`struct spi_controller
[all …]
/Documentation/devicetree/bindings/mtd/
Dnxp-spifi.txt1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
21 The SPI Flash must be a child of the SPIFI node and must have a
22 compatible property as specified in bindings/mtd/jedec,spi-nor.txt
25 - spi-cpol : Controller only supports mode 0 and 3 so either
26 both spi-cpol and spi-cpha should be present or
28 - spi-cpha : See above
29 - spi-rx-bus-width : Used to select how many pins that are used
32 See bindings/spi/spi-bus.txt for more information.
[all …]

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