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/Documentation/leds/
Dleds-sc27xx.rst16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
/Documentation/ABI/testing/
Dsysfs-bus-iio-health-afe440x7 specific stage number corresponding to datasheet stage names
19 calculated difference in the value of stage 1 - 2 and 3 - 4.
21 The LED current for the stage is controlled via
39 Transimpedance Amplifier during the associated stage.
Dsysfs-devices-platform-stratix10-rsu104 stage.
107 0 the first stage bootloader didn't run or
109 stage bootloader.
113 2 both first and second stage bootloader ran
Dsysfs-class-power-rt946711 product enter shipping stage. After entering shipping mode,
Dsysfs-class-power-rt94719 It's commonly used when the product enter shipping stage. After entering
/Documentation/userspace-api/media/v4l/
Dext-ctrls-rf-tuner.rst67 LNA (low noise amplifier) gain is first gain stage on the RF tuner
75 Mixer gain is second gain stage on the RF tuner signal path. It is
81 IF gain is last gain stage on the RF tuner signal path. It is
/Documentation/virt/kvm/arm/
Dpkvm.rst9 Protected KVM (pKVM) is a KVM/arm64 extension which uses the two-stage
19 introduced to manage manipulation of guest stage-2 page tables, creation of VM
22 at stage-2, providing the hypervisor code with a mechanism to restrict host
/Documentation/translations/sp_SP/process/
D3.Early-stage.rst3 :Original: Documentation/process/3.Early-stage.rst
/Documentation/translations/zh_CN/process/
Ddevelopment-process.rst20 3.Early-stage
D3.Early-stage.rst3 :Original: :ref:`Documentation/process/3.Early-stage.rst <development_early_stage>`
/Documentation/networking/devlink/
Diosm.rst57 device is in BOOT ROM stage. Once this is successful, the actual modem firmware
70 1) When modem is in Boot ROM stage, user can use below command to inject PSI RAM
80 3) Inject EBL after the modem is in PSI stage.
Dsfc.rst40 - SmartNIC application co-processor (APU) first stage boot loader version.
/Documentation/translations/zh_TW/process/
Ddevelopment-process.rst23 3.Early-stage
D3.Early-stage.rst5 :Original: :ref:`Documentation/process/3.Early-stage.rst <development_early_stage>`
/Documentation/process/
Ddevelopment-process.rst22 3.Early-stage
/Documentation/translations/it_IT/process/
Ddevelopment-process.rst27 3.Early-stage
/Documentation/devicetree/bindings/firmware/
Dcoreboot.txt6 second-stage bootloader (a coreboot "payload").
/Documentation/gpu/amdgpu/
Dflashing.rst15 2. "Write" the IFWI image to the sysfs file `psp_vbflash`. This will stage the IFWI in memory.
/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-emmc.yaml20 broken) ROM bootloaders are unable to read second stage from the emmc
/Documentation/devicetree/bindings/iio/frequency/
Dadf4371.yaml40 output stage will shut down until the ADF4371/ADF4372 achieves lock as
/Documentation/sound/designs/
Djack-controls.rst27 and attach it to the jack, at jack creation stage. We can also add a
/Documentation/gpu/
Dkomeda-kms.rst24 Layer is the first pipeline stage, which prepares the pixel data for the next
25 stage. It fetches the pixel from memory, decodes it if it's AFBC, rotates the
58 Final stage of display pipeline, Timing controller is not for the pixel
454 put the data flow into next stage.
462 Setup 4: adjust the input_dflow and prepare it for the next stage.
/Documentation/arch/loongarch/
Dbooting.rst25 All pointers involved at this stage are in physical addresses.
/Documentation/virt/
Dguest-halt-polling.rst61 growth stage:
/Documentation/nvme/
Dfeature-and-quirk-policy.rst56 later stage.

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