Searched +full:stm32h7 +full:- +full:i2s (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/sound/ |
| D | st,stm32-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 SPI/I2S Controller 10 - Olivier Moysan <olivier.moysan@foss.st.com> 13 The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode. 14 Only some SPI instances support I2S. 17 - $ref: dai-common.yaml# 22 - st,stm32h7-i2s [all …]
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| D | st,stm32-sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Olivier Moysan <olivier.moysan@foss.st.com> 14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 15 The SAI contains two independent audio sub-blocks. Each sub-block has 21 - st,stm32f4-sai 22 - st,stm32h7-sai 26 - description: Base address and size of SAI common register set. [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | st,stm32h7-rcc.txt | 1 STMicroelectronics STM32H7 Reset and Clock Controller 6 Please refer to clock-bindings.txt for common clock controller binding usage. 10 - compatible: Should be: 11 "st,stm32h743-rcc" 13 - reg: should be register base and length as documented in the 16 - #reset-cells: 1, see below 18 - #clock-cells : from common clock binding; shall be set to 1 20 - clocks: External oscillator clock phandle 21 - high speed external clock signal (HSE) 22 - low speed external clock signal (LSE) [all …]
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