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/Documentation/devicetree/bindings/pinctrl/
Drealtek,rtd1315e-pinctrl.yaml16 resistor, drive strength, schmitt trigger and power source.
77 drive-strength:
99 realtek,drive-strength-p:
115 The driving strength of the P-MOS/N-MOS transistors impacts the
116 waveform's rise/fall times. Greater driving strength results in
119 greater driving strength, contributing to achieving the desired
122 The realtek,drive-strength-p is used to control the driving strength
128 realtek,drive-strength-n:
130 Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
131 is used to control the driving strength of the N-MOS output.
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Drealtek,rtd1619b-pinctrl.yaml16 resistor, drive strength, schmitt trigger and power source.
75 drive-strength:
97 realtek,drive-strength-p:
113 The driving strength of the P-MOS/N-MOS transistors impacts the
114 waveform's rise/fall times. Greater driving strength results in
117 greater driving strength, contributing to achieving the desired
120 The realtek,drive-strength-p is used to control the driving strength
126 realtek,drive-strength-n:
128 Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
129 is used to control the driving strength of the N-MOS output.
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Drealtek,rtd1319d-pinctrl.yaml16 resistor, drive strength, schmitt trigger and power source.
76 drive-strength:
98 realtek,drive-strength-p:
114 The driving strength of the P-MOS/N-MOS transistors impacts the
115 waveform's rise/fall times. Greater driving strength results in
118 greater driving strength, contributing to achieving the desired
121 The realtek,drive-strength-p is used to control the driving strength
127 realtek,drive-strength-n:
129 Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
130 is used to control the driving strength of the N-MOS output.
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Dmediatek,mt8183-pinctrl.yaml81 configuration, pullups, drive strength, input enable/disable and input
110 drive-strength:
113 drive-strength-microamp:
116 mediatek,drive-strength-adv:
119 DEPRECATED: Please use drive-strength-microamp instead.
126 When E1=0/E0=0, the strength is 0.125mA.
127 When E1=0/E0=1, the strength is 0.25mA.
128 When E1=1/E0=0, the strength is 0.5mA.
129 When E1=1/E0=1, the strength is 1mA.
225 drive-strength-microamp = <1000>;
Dpincfg-node.yaml38 supporting it the pull strength in Ohm.
45 supporting it the pull strength in Ohm.
52 hardware supporting it the pull strength in Ohm.
74 drive-strength:
78 drive-strength-microamp:
100 description: threshold strength for schmitt-trigger
Dstarfive,jh7110-sys-pinctrl.yaml13 can be multiplexed and have configurable bias, drive strength,
61 trigger enable/disable, slew-rate and drive strength.
82 drive-strength:
125 drive-strength = <12>;
134 drive-strength = <2>;
Dpinctrl-single.yaml139 pinctrl-single,drive-strength:
140 description: Optional drive strength configuration
143 - description: drive strength current
144 - description: drive strength mask
147 description: Optional schmitt strength configuration
150 - description: schmitt strength current
151 - description: schmitt strength mask
Dstarfive,jh7110-aon-pinctrl.yaml13 can be multiplexed and have configurable bias, drive strength,
55 trigger enable/disable, slew-rate and drive strength.
75 drive-strength:
116 drive-strength = <12>;
Dmediatek,mt8365-pinctrl.yaml61 configuration, pullups, drive strength, input enable/disable and input
102 drive-strength:
117 drive-strength-microamp:
120 mediatek,drive-strength-adv:
123 DEPRECATED: Please use drive-strength-microamp instead.
130 When E1=0/E0=0, the strength is 0.125mA.
131 When E1=0/E0=1, the strength is 0.25mA.
132 When E1=1/E0=0, the strength is 0.5mA.
133 When E1=1/E0=1, the strength is 1mA.
Dstarfive,jh7100-pinctrl.yaml14 configurable bias, drive strength, schmitt trigger etc. The SoC has an
113 trigger enable/disable, slew-rate and drive strength.
140 drive-strength:
192 drive-strength = <35>;
200 drive-strength = <14>;
216 drive-strength = <35>;
224 drive-strength = <14>;
232 drive-strength = <14>;
252 drive-strength = <14>;
Dqcom,msm8974-pinctrl.yaml108 drive-strength: false
139 drive-strength = <2>;
145 drive-strength = <2>;
151 drive-strength = <2>;
158 drive-strength = <2>;
Dsocionext,uniphier-pinctrl.yaml41 drive-strength: true
57 drive-strength: true
81 drive-strength = <9>;
Dbrcm,iproc-gpio.txt16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
69 - drive-strength:
70 Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
86 drive-strength = <16>;
Dfsl,mxs-pinctrl.txt5 function is GPIO. The configuration on the pins includes drive strength,
19 In other words, a subnode that describes a drive strength parameter implies no
61 - fsl,drive-strength: Integer.
100 fsl,drive-strength = <MXS_DRIVE_4mA>;
112 fsl,drive-strength = <MXS_DRIVE_12mA>;
/Documentation/userspace-api/media/dvb/
Dfe-read-signal-strength.rst22 ``int ioctl(int fd, FE_READ_SIGNAL_STRENGTH, uint16_t *strength)``
30 ``strength``
31 The signal strength value is stored into \*strength.
36 This ioctl call returns the signal strength value for the signal
/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9360.yaml46 semtech,proxraw-strength:
52 PROXRAW filter strength for both phases. A value of 0 represents off,
55 semtech,avg-pos-strength:
60 Average positive filter strength. A value of 0 represents off and
94 semtech,proxraw-strength = <2>;
95 semtech,avg-pos-strength = <64>;
Dsemtech,sx9310.yaml86 semtech,proxraw-strength:
91 PROXRAW filter strength. A value of 0 represents off, and other values
94 semtech,avg-pos-strength:
99 Average positive filter strength. A value of 0 represents off and
128 semtech,proxraw-strength = <2>;
129 semtech,avg-pos-strength = <64>;
Dsemtech,sx9324.yaml106 semtech,ph01-proxraw-strength:
112 PROXRAW filter strength for phase 0 and 1. A value of 0 represents off,
115 semtech,ph23-proxraw-strength:
123 semtech,avg-pos-strength:
128 Average positive filter strength. A value of 0 represents off and
196 semtech,ph01-proxraw-strength = <2>;
197 semtech,ph23-proxraw-strength = <2>;
198 semtech,avg-pos-strength = <64>;
/Documentation/devicetree/bindings/mtd/
Dhisi504-nand.txt17 - nand-ecc-strength: Number of bits to correct per ECC step.
20 The following ECC strength and step size are currently supported:
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
35 nand-ecc-strength = <16>;
Draw-nand-chip.yaml16 The ECC strength and ECC step size properties define the user
18 they request the ECC engine to correct {strength} bit errors per
72 Whether or not the ECC strength should be maximized. The
73 maximum ECC strength is both controller and chip
75 providing the best strength and taking the OOB area size
/Documentation/devicetree/bindings/memory-controllers/
Drockchip,rk3399-dmc.yaml139 strength in ohms.
147 strength in ohms.
155 (including command line, address line and clock line) drive strength.
163 (including DQS/DQ/DM line) drive strength.
171 strength.
187 strength in ohms.
195 strength in ohms.
203 (including command line, address line and clock line) drive strength.
211 (including DQS/DQ/DM line) drive strength.
219 strength, default value is 240.
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/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.yaml113 description: Specify drive strength calibration offsets for 1.8 V
118 description: Specify drive strength used as a fallback in case the
123 description: Specify drive strength calibration offsets for 3.3 V
128 description: Specify drive strength used as a fallback in case the
133 description: Specify drive strength calibration offsets for SDR104 mode.
137 description: Specify drive strength calibration offsets for HS400 mode.
141 description: Specify drive strength calibration offsets for 1.8 V
146 description: Specify drive strength used as a fallback in case the
151 description: Specify drive strength calibration offsets for 3.3 V
156 register. A higher value corresponds to higher drive strength. Please
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/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,ksz.yaml61 microchip,io-drive-strength-microamp:
63 IO Pad Drive Strength
67 microchip,hi-drive-strength-microamp:
69 High Speed Drive Strength. Controls drive strength of GMII / RGMII /
74 microchip,lo-drive-strength-microamp:
76 Low Speed Drive Strength. Controls drive strength of TX_CLK / REFCLKI,
/Documentation/devicetree/bindings/sound/
Dfsl,sgtl5000.yaml56 lrclk-strength:
58 The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
69 sclk-strength:
71 The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
/Documentation/driver-api/media/
Ddtv-frontend.rst112 signal strength, S/N and UCB. Those are there to provide backward
183 strength, it should have, on its init code::
187 c->strength.len = 1;
188 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
192 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
193 c->strength.stat[0].uvalue = strength;
205 ``FE_SCALE_RELATIVE`` for signal strength and CNR measurements.
212 Signal strength (:ref:`DTV-STAT-SIGNAL-STRENGTH`)
213 - Measures the signal strength level at the analog part of the tuner or
218 at the maximum value (so, strength is on its minimal).
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