Searched full:sys_clk (Results 1 – 25 of 32) sorted by relevance
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| /Documentation/devicetree/bindings/soc/socionext/ |
| D | socionext,uniphier-dwc3-glue.yaml | 72 clocks = <&sys_clk 14>;
81 clocks = <&sys_clk 14>;
91 clocks = <&sys_clk 14>, <&sys_clk 16>;
101 clocks = <&sys_clk 14>, <&sys_clk 18>;
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| D | socionext,uniphier-ahci-glue.yaml | 62 clocks = <&sys_clk 28>;
72 clocks = <&sys_clk 28>, <&sys_clk 30>;
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| /Documentation/devicetree/bindings/mmc/ |
| D | microchip,sdhci-pic32.txt | 9 - clock-names: Should be "base_clk", "sys_clk".
24 clock-names = "base_clk", "sys_clk";
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| /Documentation/devicetree/bindings/clock/ |
| D | microchip,lan966x-gck.yaml | 14 ddr_clk and sys_clk. This clock controller generates and supplies
56 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
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| /Documentation/devicetree/bindings/sound/ |
| D | socionext,uniphier-evea.yaml | 71 clocks = <&sys_clk 41>, <&sys_clk 42>;
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| D | socionext,uniphier-aio.yaml | 97 clocks = <&sys_clk 40>;
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| /Documentation/devicetree/bindings/phy/ |
| D | socionext,uniphier-ahci-phy.yaml | 129 clocks = <&sys_clk 28>, <&sys_clk 30>;
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| D | socionext,uniphier-usb3ss-phy.yaml | 142 clocks = <&sys_clk 14>, <&sys_clk 16>;
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| D | socionext,uniphier-usb3hs-phy.yaml | 157 clocks = <&sys_clk 14>, <&sys_clk 16>;
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| D | socionext,uniphier-pcie-phy.yaml | 101 clocks = <&sys_clk 24>;
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| /Documentation/devicetree/bindings/mfd/ |
| D | atmel,hlcdc.yaml | 41 - const: sys_clk
71 clock-names = "periph_clk", "sys_clk", "slow_clk";
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| /Documentation/devicetree/bindings/pci/ |
| D | socionext,uniphier-pcie-ep.yaml | 126 clocks = <&sys_clk 12>, <&sys_clk 24>;
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| /Documentation/devicetree/bindings/display/ti/ |
| D | ti,omap5-dss.txt | 70 - clock-names: "fck", "sys_clk"
93 - clock-names: "fck", "sys_clk"
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| D | ti,omap4-dss.txt | 89 - clock-names: "fck", "sys_clk"
112 - clock-names: "fck", "sys_clk"
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| D | ti,dra7-dss.txt | 67 - clock-names: "fck", "sys_clk"
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| D | ti,omap3-dss.txt | 83 - clock-names: "fck", "sys_clk"
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| /Documentation/devicetree/bindings/net/ |
| D | qcom-emac.txt | 44 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
93 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
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| /Documentation/devicetree/bindings/bus/ |
| D | ti-sysc.yaml | 97 - enum: [ ick, fck, sys_clk ]
100 - enum: [ ick, dbclk, osc, sys_clk, dss_clk, ahclkx ]
108 - const: sys_clk
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| /Documentation/devicetree/bindings/hwmon/ |
| D | microchip,sparx5-temp.yaml | 43 clocks = <&sys_clk>;
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| D | microchip,lan966x.yaml | 51 clocks = <&sys_clk>;
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| D | maxim,max31790.yaml | 57 clocks = <&sys_clk>;
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| /Documentation/devicetree/bindings/watchdog/ |
| D | img,pdc-wdt.yaml | 52 clocks = <&pdc_wdt_clk>, <&sys_clk>;
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| /Documentation/devicetree/bindings/media/ |
| D | cdns,csi2rx.yaml | 38 - const: sys_clk
142 clock-names = "sys_clk", "p_clk",
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| /Documentation/devicetree/bindings/regulator/ |
| D | socionext,uniphier-regulator.yaml | 96 clocks = <&sys_clk 14>;
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| /Documentation/devicetree/bindings/reset/ |
| D | socionext,uniphier-glue-reset.yaml | 107 clocks = <&sys_clk 14>;
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