Searched +full:thermal +full:- +full:zones (Results 1 – 25 of 26) sorted by relevance
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| /Documentation/devicetree/bindings/thermal/ |
| D | thermal-sensor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-sensor.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Thermal sensor 11 - Amit Kucheria <amitk@kernel.org> 14 Thermal management is achieved in devicetree by describing the sensor hardware 15 and the software abstraction of thermal zones required to take appropriate 16 action to mitigate thermal overloads. 18 The following node types are used to completely describe a thermal management [all …]
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| D | thermal-zones.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# 6 $schema: http://devicetree.org/meta-schemas/base.yaml# 8 title: Thermal zone 11 - Daniel Lezcano <daniel.lezcano@linaro.org> 14 Thermal management is achieved in devicetree by describing the sensor hardware 15 and the software abstraction of cooling devices and thermal zones required to 16 take appropriate action to mitigate thermal overloads. 18 The following node types are used to completely describe a thermal management [all …]
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| D | thermal-cooling-devices.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Thermal cooling device 11 - Amit Kucheria <amitk@kernel.org> 14 Thermal management is achieved in devicetree by describing the sensor hardware 15 and the software abstraction of cooling devices and thermal zones required to 16 take appropriate action to mitigate thermal overload. 18 The following node types are used to completely describe a thermal management [all …]
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| D | amazon,al-thermal.txt | 1 Amazon's Annapurna Labs Thermal Sensor 3 Simple thermal device that allows temperature reading by a single MMIO 7 - compatible: "amazon,al-thermal". 8 - reg: The physical base address and length of the sensor's registers. 9 - #thermal-sensor-cells: Must be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.ya… 12 thermal: thermal { 13 compatible = "amazon,al-thermal"; 15 #thermal-sensor-cells = <0x1>; 18 thermal-zones { 19 thermal-z0 { [all …]
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| D | brcm,ns-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom Northstar Thermal 10 - Rafał Miłecki <rafal@milecki.pl> 13 Thermal sensor that is part of Northstar's DMU (Device Management Unit). 16 - $ref: thermal-sensor.yaml# 20 const: brcm,ns-thermal 26 "#thermal-sensor-cells": [all …]
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| D | st,stm32-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 digital thermal sensor (DTS) 10 - Pascal Paillet <p.paillet@foss.st.com> 12 $ref: thermal-sensor.yaml# 16 const: st,stm32-thermal 27 clock-names: 29 - const: pclk [all …]
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| D | max77620_thermal.txt | 1 Thermal driver for MAX77620 Power management IC from Maxim Semiconductor. 10 ------------------- 11 #thermal-sensor-cells: For more details, please refer to 12 <devicetree/bindings/thermal/thermal-sensor.yaml> 15 For more details, please refer generic thermal DT binding document 16 <devicetree/bindings/thermal/thermal*.yaml>. 22 -------- 23 #include <dt-bindings/mfd/max77620.h> 24 #include <dt-bindings/thermal/thermal.h> 31 #thermal-sensor-cells = <0>; [all …]
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| D | rzg2l-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/rzg2l-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas RZ/G2L Thermal Sensor Unit 10 On RZ/G2L SoCs, the thermal sensor unit (TSU) measures the 14 - Biju Das <biju.das.jz@bp.renesas.com> 16 $ref: thermal-sensor.yaml# 21 - enum: 22 - renesas,r9a07g043-tsu # RZ/G2UL and RZ/Five [all …]
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| D | qcom,spmi-temp-alarm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 18 - $ref: thermal-sensor.yaml# 22 const: qcom,spmi-temp-alarm 30 io-channels: 32 - description: ADC channel, which reports chip die temperature 34 io-channel-names: [all …]
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| D | brcm,sr-thermal.txt | 1 * Broadcom Stingray Thermal 3 This binding describes thermal sensors that is part of Stingray SoCs. 6 - compatible : Must be "brcm,sr-thermal" 7 - reg : Memory where tmon data will be available. 8 - brcm,tmon-mask: A one cell bit mask of valid TMON sources. 10 - #thermal-sensor-cells : Thermal sensor phandler 11 - polling-delay: Max number of milliseconds to wait between polls. 12 - thermal-sensors: A list of thermal sensor phandles and specifier. 14 in correspond with brcm,tmon-mask. 15 - temperature: trip temperature threshold in millicelsius. [all …]
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| D | rcar-gen3-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 5 $id: http://devicetree.org/schemas/thermal/rcar-gen3-thermal.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Gen3 Thermal Sensor 11 On most R-Car Gen3 and later SoCs, the thermal sensor controllers (TSC) 12 control the thermal sensors (THS) which are the analog circuits for 16 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 18 $ref: thermal-sensor.yaml# 23 - renesas,r8a774a1-thermal # RZ/G2M [all …]
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| D | mediatek,lvts-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) 10 - Balsam CHIHI <bchihi@baylibre.com> 13 LVTS is a thermal management architecture composed of three subsystems, 14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), 15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and 21 - mediatek,mt7988-lvts-ap [all …]
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| D | rcar-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 5 $id: http://devicetree.org/schemas/thermal/rcar-thermal.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Thermal 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 16 - items: 17 - enum: 18 - renesas,thermal-r8a73a4 # R-Mobile APE6 19 - renesas,thermal-r8a7779 # R-Car H1 [all …]
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| D | nvidia,tegra124-soctherm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra124-soctherm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra124 SOCTHERM Thermal Management System 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The SOCTHERM IP block contains thermal sensors, support for 14 polled or interrupt-based thermal monitoring, CPU and GPU throttling based 21 - nvidia,tegra124-soctherm [all …]
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| /Documentation/devicetree/bindings/display/ |
| D | repaper.txt | 1 Pervasive Displays RePaper branded e-ink displays 4 - compatible: "pervasive,e1144cs021" for 1.44" display 9 - panel-on-gpios: Timing controller power control 10 - discharge-gpios: Discharge control 11 - reset-gpios: RESET pin 12 - busy-gpios: BUSY pin 15 - border-gpios: Border control 18 all mandatory properties described in ../spi/spi-bus.txt must be specified. 21 - pervasive,thermal-zone: name of thermometer's thermal zone 28 #thermal-sensor-cells = <0>; [all …]
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| /Documentation/devicetree/bindings/hwmon/ |
| D | pwm-fan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwmon/pwm-fan.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jean Delvare <jdelvare@suse.com> 11 - Guenter Roeck <linux@roeck-us.net> 15 const: pwm-fan 17 cooling-levels: 18 description: PWM duty cycle values corresponding to thermal cooling states. 19 $ref: /schemas/types.yaml#/definitions/uint32-array [all …]
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| /Documentation/driver-api/thermal/ |
| D | sysfs-api.rst | 2 Generic Thermal Sysfs driver How To 13 The generic thermal sysfs provides a set of interfaces for thermal zone 14 devices (sensors) and thermal cooling devices (fan, processor...) to register 15 with the thermal management solution and to be a part of it. 17 This how-to focuses on enabling new thermal zone and cooling devices to 18 participate in thermal management. 19 This solution is platform independent and any type of thermal zone devices 22 The main task of the thermal sysfs driver is to expose thermal zone attributes 24 An intelligent thermal management application can make decisions based on 25 inputs from thermal zone attributes (the current temperature and trip point [all …]
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| D | power_allocator.rst | 6 ----------- 12 point of the thermal zone. 17 thermal zone. 20 -------------- 23 Proportional-Integral-Derivative controller (PID controller) with 29 - e = desired_temperature - current_temperature 30 - err_integral is the sum of previous errors 31 - diff_err = e - previous_error 39 | +----------+ +---+ 40 | +----->| diff_err |-->| X |------+ [all …]
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| /Documentation/hwmon/ |
| D | asc7621.rst | 20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as 21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has 22 added PECI and a 4th thermal zone. The Andigilog aSC7611 is the 23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in 28 have used registers below 20h for vendor-specific functions in addition 29 to those in the Intel-specified vendor range. 32 The fan speed control uses this finer value to produce a "step-less" fan 33 PWM output. These two bytes are "read-locked" to guarantee that once a 34 high or low byte is read, the other byte is locked-in until after the 37 sheet says 10-bits of resolution, although you may find the lower bits [all …]
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| D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space 34 Addresses scanned: none, address read from Super-I/O config space 43 ----------------- 52 Include non-standard LPC addresses 0x162e and 0x164e 55 - VIA EPIA SN18000 59 ----------- 63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors 64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and 65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement 66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and [all …]
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| D | lm85.rst | 79 - Philip Pokorny <ppokorny@penguincomputing.com>, 80 - Frodo Looijaard <frodol@dds.nl>, 81 - Richard Barrington <rich_b_nz@clear.net.nz>, 82 - Margit Schubert-While <margitsw@t-online.de>, 83 - Justin Thiessen <jthiessen@penguincomputing.com> 86 ----------- 92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0 94 temperatures and five (5) voltages. It has four (4) 16-bit counters for 106 measure a thermal diode like the one in a Pentium 4 processor in a socket 127 ---------------- [all …]
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | ap80x-system-controller.txt | 6 registers giving access to numerous features: clocks, pin-muxing and 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the AP80x system controller 18 ------- 24 - 0: reference clock of CPU cluster 0 25 - 1: reference clock of CPU cluster 1 26 - 2: fixed PLL at 1200 Mhz 27 - 3: MSS clock, derived from the fixed PLL 31 - compatible: must be one of: 32 * "marvell,ap806-clock" [all …]
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| D | cp110-system-controller.txt | 6 giving access to numerous features: clocks, pin-muxing and many other 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the CP110 system controller 18 ------- 23 - a set of core clocks 24 - a set of gateable clocks 28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the 30 - The second cell identifies the particular core clock or gateable 34 - Core clocks 35 - 0 0 APLL [all …]
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| /Documentation/admin-guide/thermal/ |
| D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com> 7 - Jacob Pan <jacob.jun.pan@linux.intel.com> 12 - Goals and Objectives 15 - Idle Injection 16 - Calibration 19 - Effectiveness and Limitations 20 - Power vs Performance 21 - Scalability 22 - Calibration 23 - Comparison with Alternative Techniques [all …]
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| /Documentation/firmware-guide/acpi/ |
| D | namespace.rst | 1 .. SPDX-License-Identifier: GPL-2.0 5 ACPI Device Tree - Representation of ACPI Namespace 32 includes various fixed-length entries that describe fixed ACPI features 48 +---------+ +-------+ +--------+ +------------------------+ 49 | RSDP | +->| XSDT | +->| FADT | | +-------------------+ | 50 +---------+ | +-------+ | +--------+ +-|->| DSDT | | 51 | Pointer | | | Entry |-+ | ...... | | | +-------------------+ | 52 +---------+ | +-------+ | X_DSDT |--+ | | Definition Blocks | | 53 | Pointer |-+ | ..... | | ...... | | +-------------------+ | 54 +---------+ +-------+ +--------+ | +-------------------+ | [all …]
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