Searched full:timers (Results 1 – 25 of 117) sorted by relevance
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| /Documentation/timers/ |
| D | hrtimers.rst | 2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
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| D | hpet.rst | 12 also called "timers", which can be misleading since usually timers are
19 mode where the first two comparators block interrupts from 8254 timers
30 file:samples/timers/hpet_example.c
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| D | index.rst | 4 Timers title
15 timers-howto
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| D | highres.rst | 2 High resolution timers and dynamic ticks design notes
34 the base implementation are covered in Documentation/timers/hrtimers.rst. See
38 timers are:
64 Timers" was written by J. Stultz, D.V. Hart, & N. Aravamudan.
82 functionality like high resolution timers or dynamic ticks.
102 accounting, profiling, and high resolution timers.
134 enabling of high resolution timers and dynamic ticks is simply provided by
156 configured for high resolution timers can run on a system which lacks the
167 The time ordered insertion of timers provides all the infrastructure to decide
175 from the clock event distribution code and moves expired timers from the
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| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers
13 delay timers.
17 on this timeline, providing facilities such as high-resolution timers.
18 sched_clock() is used for scheduling and timestamping, and delay timers
160 Delay timers (some architectures only)
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| /Documentation/sound/ |
| D | utimers.rst | 4 Userspace-driven timers
12 This document describes the userspace-driven timers: virtual ALSA timers
14 IOCTL calls. Such timers could be useful when synchronizing audio
15 stream with timer sources which we don't have ALSA timers exported for
21 Enabling userspace-driven timers
24 The userspace-driven timers could be enabled in the kernel using the
28 Userspace-driven timers API
51 applications. There could be up to 128 userspace-driven timers in the
96 Userspace-driven timers and snd-aloop
99 Userspace-driven timers could be easily used with ``snd-aloop`` module
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-samsung.yaml | 7 title: Samsung SoC PWM timers
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
49 - "timers" - PWM base clock used to generate PWM signals,
58 - const: timers
60 - const: timers
63 - const: timers
66 - const: timers
126 clock-names = "timers";
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| D | snps,dw-apb-timers-pwm2.yaml | 5 $id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
8 title: Synopsys DW-APB timers PWM controller
14 This describes the DesignWare APB timers module when used in the PWM
28 const: snps,dw-apb-timers-pwm2
62 compatible = "snps,dw-apb-timers-pwm2";
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| D | ti,omap-dmtimer-pwm.yaml | 25 ti,timers:
49 - ti,timers
57 ti,timers = <&timer9>;
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| /Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 145 == Timers
148 timers that can be used.
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 37 'timers', 'watchdog-timers' etc.
142 ti,timers:
148 as System/Tick timers for the OS running on the remote
152 to reserve specific timers to be dedicated to the
157 features. The timers to be used should match with the
158 timers used in the firmware image.
160 ti,watchdog-timers:
166 serve as Watchdog timers for the processor cores. This
170 The timers to be used should match with the watchdog
171 timers used in the firmware image.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic-timer.txt | 1 * Freescale MPIC timers
12 all timers within the group can be used.
16 interrupts that correspond to available timers shall be present.
24 /* Another AMP partition is using timers 0 and 1 */
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
7 title: STMicroelectronics STM32 Timers
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
24 const: st,stm32-timers
156 compatible = "st,stm32-timers";
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| /Documentation/devicetree/bindings/timer/ |
| D | samsung,exynos4210-mct.yaml | 14 global timer and CPU local timers. The global timer is a 64-bit free running
16 four preset counter values. The CPU local timers are 32-bit free running
56 samsung,local-timers:
61 List of indices of local timers usable from this processor.
77 For MCT block that uses a per-processor interrupt for local timers, such
79 interrupt might be specified, meaning that all local timers use the same
101 samsung,local-timers: false
158 // In this example, the IP contains two local timers, using separate
199 // In this example, the IP contains four local timers, but using
219 // In this example, the IP contains four local timers, but using
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| D | mediatek,timer.yaml | 7 title: MediaTek SoC timers
13 MediaTek SoCs have different timers on different platforms,
25 # GPT Timers
38 # SYST Timers
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| D | marvell,armada-370-xp-timer.txt | 1 Marvell Armada 370 and Armada XP Timers
11 - reg: Should contain location and length for timers register. First
13 local/private timers.
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| D | brcm,bcmbca-timer.yaml | 17 An old block with 3 timers.
22 Updated block with 4 timers and control regs at the beginning.
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| D | ti,keystone-timer.txt | 5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
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| D | arm,sp804.yaml | 7 title: ARM sp804 Dual Timers
13 The Arm SP804 IP implements two independent timers, configurable for
65 - description: unified clock for both timers and the bus
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| D | ti,da830-timer.yaml | 15 32-bit timers. When configured as dual 32-bit timers, each half can operate
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| D | sprd,sc9860-timer.yaml | 15 The Spreadtrum SC9860 platform provides 3 general-purpose timers.
16 These timers can support 32bit or 64bit counter, as well as supporting
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| D | marvell,orion-timer.txt | 5 - reg: base address of the timer register starting with TIMERS CONTROL register
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| /Documentation/virt/hyperv/ |
| D | clocks.rst | 3 Clocks and Timers
14 per-CPU timers as described in the TLFS, they are not used by the
20 out-of-tree patch to use the Hyper-V synthetic clocks/timers instead.
25 and four synthetic per-CPU timers as described in the TLFS. Hyper-V
66 While Hyper-V offers 4 synthetic timers for each CPU, Linux only uses
81 The driver for the Hyper-V synthetic system clock and timers is
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| /Documentation/devicetree/bindings/x86/ |
| D | timer.txt | 1 Timers
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-netxbig.txt | 9 - timers: Timer array. Each timer entry is represented by three integers:
32 timers = <NETXBIG_LED_TIMER1 500 500
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