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/Documentation/devicetree/bindings/display/
Dallwinner,sun8i-r40-tcon-top.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
7 title: Allwinner R40 TCON TOP
26 TCON-TOP
29 | TCON-TOP - HDMI
33 Note that both TCON TOP references same physical unit. Both mixers
34 can be connected to any TCON. Not all TCON TOP variants support all
43 - allwinner,sun8i-r40-tcon-top
44 - allwinner,sun20i-d1-tcon-top
45 - allwinner,sun50i-h6-tcon-top
122 const: allwinner,sun8i-r40-tcon-top
[all …]
Damlogic,meson-dw-hdmi.yaml19 - A TOP control block controlling the Clocks and PHY
22 | HDMI TOP |<= HPD
29 The HDMI TOP block only supports HPD sensing.
31 TOP Block interrupt.
32 Communication to the TOP Block and the Synopsys HDMI Controller is done
40 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
Damlogic,meson-g12a-dw-mipi-dsi.yaml16 - A TOP control block controlling the Clocks & Resets of the IP
46 - const: top
90 reset-names = "top";
/Documentation/userspace-api/media/v4l/
Dfield-order.rst29 combine to frames. We distinguish between top (aka odd) and bottom (aka
30 even) fields, the *spatial order*: The first line of the top field is
35 whether a frame commences with the top or bottom field is pointless. Any
36 two successive top and bottom, or bottom and top fields yield a valid
41 Counter to intuition the top field is not necessarily the older field.
42 Whether the older field contains the top or bottom lines is a convention
48 bus in the same order they were captured, so if the top field was
49 captured first (is the older field), the top field is also transmitted
92 - Images consist of the top (aka odd) field only.
102 order of the fields (whether the top or bottom field is older)
[all …]
Dselection-api-configuration.rst30 The range of coordinates of the top left corner, width and height of
32 target. It is recommended for the driver developers to put the top/left
36 The top left corner, width and height of the source rectangle, that is
51 coordinates are expressed in pixels. The rectangle's top/left corner
91 All coordinates are expressed in pixels. The top/left corner is always
95 The top left corner, width and height of the source rectangle, that is
117 the driver developers to put the top/left corner at position ``(0,0)``.
Dpixfmt-intro.rst27 are always arranged in memory from left to right, and from top to
30 immediately to its right, and so on until the end of the top row of
34 leftmost pixel of the second row from the top, and so on. The last row
/Documentation/admin-guide/cifs/
Dwinucase_convert.pl28 $top[$firstchar][$secondchar] = $uppercase;
32 next if (!$top[$i]);
41 printf("0x%4.4x,", $top[$i][$j] ? $top[$i][$j] : 0);
50 } elsif ($top[$i]) {
56 if ($top[$i]) {
/Documentation/devicetree/bindings/sound/
Dmediatek,mt2701-audio.yaml37 - description: top audio mux 1
38 - description: top audio mux 2
39 - description: top audio sys a1 clock
40 - description: top audio sys a2 clock
67 - description: top audio a1 sys pd
68 - description: top audio a2 sys pd
Dimg,pistachio-internal-dac.txt7 - img,cr-top : Must contain a phandle to the top level control syscon
16 img,cr-top = <&cr_top>;
/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-voutcrg.yaml21 - description: Vout Top core
22 - description: Vout Top Ahb
23 - description: Vout Top Axi
24 - description: Vout Top HDMI MCLK
39 description: Vout Top core
Dstarfive,jh7110-ispcrg.yaml21 - description: ISP Top core
22 - description: ISP Top Axi
35 - description: ISP Top core
36 - description: ISP Top Axi
Dpistachio-clock.txt5 general control, and top general control) which are instantiated individually
31 top-level general control.
99 Top-level general control:
102 The top-level general control block contains miscellaneous control registers and
106 - compatible: Must include "img,pistachio-cr-top" and "syscon".
107 - reg: Must contain the base address and length of the top-level
117 compatible = "img,pistachio-cr-top", "syscon";
Damlogic,c3-pll-clkc.yaml25 - description: input top pll
31 - const: top
59 clock-names = "top", "mclk", "fix";
Dgoogle,gs101-clock.yaml19 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
30 - google,gs101-cmu-top
65 - google,gs101-cmu-top
174 compatible = "google,gs101-cmu-top";
/Documentation/tools/rtla/
Drtla-osnoise-top.rst2 rtla-osnoise-top
12 **rtla osnoise top** [*OPTIONS*]
18 **rtla osnoise top** collects the periodic summary from the *osnoise* tracer,
35 In the example below, the **rtla osnoise top** tool is set to run with a
41 [root@f34 ~]# rtla osnoise top -P F:1 -c 0-3 -r 900000 -d 1M -q
Drtla-timerlat.rst22 The **rtla timerlat top** mode displays a summary of the periodic output
29 **top**
37 If no *MODE* is given, the top mode is called, passing the arguments.
49 **rtla-timerlat-top**\(1), **rtla-timerlat-hist**\(1)
Drtla-osnoise.rst22 for each noise via the **osnoise:** tracepoints. The **rtla osnoise top**
30 **top**
38 If no MODE is given, the top mode is called, passing the arguments.
51 **rtla-osnoise-top**\(1), **rtla-osnoise-hist**\(1)
Dindex.rst16 rtla-osnoise-top
19 rtla-timerlat-top
/Documentation/sound/designs/
Dchannel-mapping-api.rst108 SNDRV_CHMAP_TC, /* top center */
109 SNDRV_CHMAP_TFL, /* top front left */
110 SNDRV_CHMAP_TFR, /* top front right */
111 SNDRV_CHMAP_TFC, /* top front center */
112 SNDRV_CHMAP_TRL, /* top rear left */
113 SNDRV_CHMAP_TRR, /* top rear right */
114 SNDRV_CHMAP_TRC, /* top rear center */
/Documentation/sphinx/
Dparallel-wrapper.sh6 # the "auto" parallelism when "-jN" is not specified at the top-level
14 # If no parallelism is specified at the top-level make, then
/Documentation/devicetree/bindings/mmc/
Dsdhci-st.txt26 contain the FlashSS Top register for TX/RX delay used by the driver
31 - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
96 reg-names = "mmc", "top-mmc-delay";
/Documentation/devicetree/bindings/phy/
Dpistachio-usb-phy.txt11 - img,cr-top: Must contain a phandle to the CR_TOP syscon node.
27 img,cr-top = <&cr_top>;
/Documentation/devicetree/bindings/interrupt-controller/
Dmarvell,mpic.yaml13 The top-level interrupt controller on Marvell Armada 370 and XP. On these
32 Parent interrupt on platforms where MPIC is not the top-level
/Documentation/userspace-api/media/drivers/
Dcx2341x-uapi.rst19 and from top to bottom. Each block is transmitted in turn, line-by-line.
21 So the first 16 bytes are the first line of the top-left block, the
22 second 16 bytes are the second line of the top-left block, etc. After
27 to right, top to bottom. Each block is transmitted in turn, line-by-line.
29 So the first 16 bytes are the first line of the top-left block and
31 second line of 8 UV pairs of the top-left block, etc. After transmitting
/Documentation/driver-api/media/drivers/
Dsh_mobile_ceu_camera.rst51 S_CROP(left / top = (5) - (1), width / height = (5') - (5))
57 (1) to (2) - sensor cropped left or top
60 (3) to (4) - CEU cropped left or top
63 (2) to (5) - reverse sensor scale applied to CEU cropped left or top

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