Searched full:topology (Results 1 – 25 of 128) sorted by relevance
123456
| /Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 27 What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
33 What: /sys/devices/system/cpu/cpuX/topology/die_id
39 What: /sys/devices/system/cpu/cpuX/topology/core_id
45 What: /sys/devices/system/cpu/cpuX/topology/cluster_id
51 What: /sys/devices/system/cpu/cpuX/topology/book_id
57 What: /sys/devices/system/cpu/cpuX/topology/drawer_id
63 What: /sys/devices/system/cpu/cpuX/topology/core_cpus
68 What: /sys/devices/system/cpu/cpuX/topology/core_cpus_list
74 What: /sys/devices/system/cpu/cpuX/topology/package_cpus
79 What: /sys/devices/system/cpu/cpuX/topology/package_cpus_list
[all …]
|
| D | firewire-cdev | 58 during its entire life time. Bus topology changes, and hence
60 need to be aware of topology.
|
| /Documentation/admin-guide/media/ |
| D | vimc.rst | 9 Topology chapter
12 The topology is hardcoded, although you could modify it in vimc-core and
13 recompile the driver to achieve your own topology. This is the default topology:
18 :alt: Diagram of the default media pipeline topology
23 Configuring the topology
27 width, ...). One needs to configure the topology in order to match the
32 of commands fits for the default topology:
47 Subdevices define the behavior of an entity in the topology. Depending on the
|
| D | raspberrypi-pisp-be.rst | 38 The media topology registered by the `pisp-be` driver is represented below:
40 .. _pips-be-topology:
43 :alt: Diagram of the default media pipeline topology
|
| /Documentation/networking/ |
| D | phy-link-topology.rst | 5 PHY link topology
11 The PHY link topology representation in the networking stack aims at representing
35 The link topology then looks like this (when an SFP module is inserted) ::
62 The phy_link topology framework aims at providing a way to keep track of every
64 report the topology to userspace, allowing to target individual PHYs in configuration
72 it is then possible to register PHYs to the topology through :
76 Besides registering the PHY to the topology, this call will also assign a unique
79 0 is reserved to indicate the PHY doesn't belong to any topology yet.
81 The PHY can then be removed from the topology through
87 join the netdev's topology.
[all …]
|
| D | bridge.rst | 76 network topology.
91 for the spanning tree algorithm to create a loop-free topology.
114 topology.
116 topology is established, each bridge determines which of its ports should
122 topology is established, each non-root bridge processes incoming
134 redundant links. When network topology changes occur (e.g., a link failure),
135 STP recalculates the network topology to restore connectivity while avoiding loops.
|
| /Documentation/admin-guide/ |
| D | cputopology.rst | 2 How CPU topology info is exported via sysfs
5 CPU topology info is exported via sysfs. Items (attributes) are similar
7 /sys/devices/system/cpu/cpuX/topology/. Please refer to the ABI file:
10 Architecture-neutral, drivers/base/topology.c, exports these attributes.
16 these macros in include/asm-XXX/topology.h::
36 To be consistent on all architectures, include/linux/topology.h
38 not defined by include/asm-XXX/topology.h:
53 Additionally, CPU topology information is provided under
|
| /Documentation/translations/zh_CN/admin-guide/ |
| D | cputopology.rst | 15 /sys/devices/system/cpu/cpuX/topology/。请阅读ABI文件：
18 drivers/base/topology.c是体系结构中性的，它导出了这些属性。然而，die、cluster、book、
21 对于支持这个特性的体系结构，它必须在include/asm-XXX/topology.h中定义这些宏中的一部分::
41 为了在所有体系结构上保持一致，include/linux/topology.h提供了上述所有宏的默认定义，以防
42 它们未在include/asm-XXX/topology.h中定义:
|
| /Documentation/translations/zh_TW/admin-guide/ |
| D | cputopology.rst | 15 /sys/devices/system/cpu/cpuX/topology/。請閱讀ABI文件：
18 drivers/base/topology.c是體系結構中性的，它導出了這些屬性。然而，die、cluster、book、
21 對於支持這個特性的體系結構，它必須在include/asm-XXX/topology.h中定義這些宏中的一部分::
41 爲了在所有體系結構上保持一致，include/linux/topology.h提供了上述所有宏的默認定義，以防
42 它們未在include/asm-XXX/topology.h中定義:
|
| /Documentation/arch/x86/ |
| D | topology.rst | 4 x86 Topology
7 This documents and clarifies the main aspects of x86 topology modelling and
11 The architecture-agnostic topology definitions are in
14 definitions. Thus, the way to read up on Linux topology on x86 is to start
18 here to *document* the inner workings of x86 topology.
22 The main aim of the topology facilities is to present adequate interfaces to
33 The topology of a system is described in the units of:
48 Package-related topology information in the kernel:
111 Thread-related topology information in the kernel:
140 System topology examples
|
| D | index.rst | 14 topology
|
| /Documentation/driver-api/cxl/ |
| D | access-coordinates.rst | 18 The algorithm assumes the configuration is a symmetric topology as that
19 maximizes performance. When asymmetric topology is detected, the calculation
20 is aborted. An asymmetric topology is detected during topology walk where the
74 in the topology. For endpoints directly attached to RPs, this step is skipped.
79 Once the topology walk reaches the RP, whether it's direct attached endpoints
|
| D | memory-devices.rst | 21 assemble them into a CXL.mem decode topology. The need for runtime configuration
22 of the CXL.mem topology is also similar to RAID in that different environments
23 with the same hardware configuration may decide to assemble the topology in
26 and disable any striping in the CXL.mem topology.
29 (Linux term for the top of the CXL decode topology). From there, PCIe topology
38 Here is a sample listing of a CXL topology defined by 'cxl_test'. The 'cxl_test'
39 module generates an emulated CXL topology of 2 Host Bridges each with 2 Root
190 Continuing the RAID analogy, disks have both topology metadata and on device
191 metadata that determine RAID set assembly. CXL Port topology and CXL Port link
192 status is metadata for CXL.mem set assembly. The CXL Port topology is enumerated
[all …]
|
| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 2 CPU topology binding description
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
35 A topology description containing phandles to cpu nodes that are not compliant
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
43 child of the cpus node and provides a container where the actual topology
48 Usage: Optional - On SMP systems provide CPUs topology to the OS.
49 Uniprocessor systems do not require a topology
54 subnodes describe the CPU topology.
76 The nodes describing the CPU topology (socket/cluster/core/thread) can
[all …]
|
| /Documentation/i2c/ |
| D | i2c-topology.rst | 93 If you build a topology with a mux-locked mux being the parent
107 intent with such a topology would in this hypothetical example
174 If you build a topology with a parent-locked mux being the child
196 This is a useful topology, but it can be bad::
212 This topology is bad if M2 is an auto-closing mux and M1->select
220 This is a good topology::
243 This is probably a bad topology::
259 This kind of topology is generally not suitable and should probably
266 The topology is especially troublesome if M2 is an auto-closing
271 auto-closing, the topology is fine.
[all …]
|
| D | i2c-sysfs.rst | 10 I2C topology can be complex because of the existence of I2C MUX
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
17 topology and navigating through the I2C sysfs in Linux shell. This knowledge is
32 2. General knowledge of I2C, I2C MUX and I2C topology.
115 For the following content, we will use a more complex I2C topology as an
116 example. Here is a brief graph for the I2C topology. If you do not understand
185 hardware I2C topology.
255 Tip: Once you understand the I2C topology with MUX, command
262 an overview of the I2C topology easily, if it is available on your system. For
|
| /Documentation/gpu/dp-mst/ |
| D | topology-figure-2.dot | 21 label="Topology Manager";
24 /* Topology references */
|
| D | topology-figure-1.dot | 21 label="Topology Manager";
24 /* Topology references */
|
| D | topology-figure-3.dot | 23 label="Topology Manager";
26 /* Topology references */
|
| /Documentation/devicetree/bindings/fsi/ |
| D | fsi.txt | 15 Under the masters' nodes, we can describe the bus topology using nodes to
19 /* top-level of FSI bus topology, bound to an FSI master driver and
39 Note that since the bus is probe-able, some (or all) of the topology may
52 Since the master nodes describe the top-level of the FSI topology, they also
|
| /Documentation/mhi/ |
| D | topology.rst | 4 MHI Topology
7 This document provides information about the MHI topology modeling and
|
| D | index.rst | 11 topology
|
| /Documentation/ABI/testing/ |
| D | sysfs-bus-event_source-devices-hv_gpci | 88 This sysfs file exposes the system topology information by making HCALL
120 This sysfs file exposes the system topology information by making HCALL
152 This sysfs file exposes the system topology information by making HCALL
184 This sysfs file exposes the system topology information by making HCALL
216 This sysfs file exposes the system topology information by making HCALL
|
| /Documentation/userspace-api/media/mediactl/ |
| D | media-funcs.rst | 17 media-ioc-g-topology
|
| /Documentation/devicetree/bindings/memory-controllers/ |
| D | calxeda-ddr-ctrlr.yaml | 12 purposes and to learn about the DRAM topology.
|
123456