Searched full:transactions (Results 1 – 25 of 120) sorted by relevance
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi-props.yaml | 16 Select one of the transactions type supported
42 NOR and PSRAM transactions type). By default, Address/Data
72 transactions. By default, the NWAIT signal is not taken into account
73 during asynchronous transactions.
90 phase in nanoseconds used for asynchronous read/write transactions.
95 transactions.
99 in nanoseconds used for asynchronous read/write transactions.
107 in nanoseconds used for asynchronous read/write transactions.
119 phase in nanoseconds used for asynchronous write transactions.
124 transactions.
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| /Documentation/filesystems/xfs/ |
| D | xfs-delayed-logging-design.rst | 15 We begin with an overview of transactions in XFS, followed by describing how
17 guarantee forwards progress for long running transactions with finite initial
54 Transactions in XFS
57 XFS has two types of high level transactions, defined by the type of log space
59 transactions. Permanent transaction reservations can take reservations that span
60 commit boundaries, whilst "one shot" transactions are for a single atomic
64 place. This means that permanent transactions can be used for one-shot
66 transactions.
82 transactions, and the pattern looks like this::
99 transactions together::
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio.txt | 64 memory and maintenance transactions then a single LIODN is
65 represented in the property for both transactions.
68 memory transactions and a unique LIODN for maintenance
69 transactions then a pair of LIODNs are represented in the
71 LIODN associated with memory transactions and the second element
72 represents the LIODN associated with maintenance transactions
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| /Documentation/ABI/testing/ |
| D | sysfs-fs-xfs | 25 outstanding transactions in bytes.
35 outstanding transactions, including regrants due to
36 rolling transactions in bytes.
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| D | sysfs-bus-mdio | 32 Total number of write transactions for this MDIO bus.
40 Total number of read transactions for this MDIO bus.
64 Total number of write transactions for this MDIO bus address.
72 Total number of read transactions for this MDIO bus address.
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| D | sysfs-driver-fsi-master-gpio | 8 driver performs FSI bus transactions, 1 sets external mode,
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| D | sysfs-kernel-iommu_groups | 43 DMA All the DMA transactions from the device in this group
48 identity All the DMA transactions from the device in this group
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| /Documentation/arch/xtensa/ |
| D | atomctl.rst | 10 can do Atomic Transactions to the memory internally.
13 can do Atomic Transactions itself.
20 which can implement RCW transactions. For FPGA cards with an External
31 don't support atomic RCW memory transactions and will likely want to
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| /Documentation/i2c/ |
| D | dev-interface.rst | 94 transactions (mixing read and write messages in the same transaction)
120 Used only for SMBus transactions. This request only has an effect if the
147 You can do plain I2C transactions by using read(2) and write(2) calls.
151 You can do SMBus level transactions (see documentation file smbus-protocol.rst
168 All these transactions return -1 on failure; you can read errno to see
169 what happened. The 'write' transactions return 0 on success; the
170 'read' transactions return the read value, except for read_block, which
196 checking on future transactions.)
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| D | i2c-protocol.rst | 5 This document is an overview of the basic I2C transactions and the kernel
41 Combined transactions
46 They are just like the above transactions, but instead of a stop
53 Modified transactions
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| D | functionality.rst | 72 A typical SMBus-only adapter would list all the SMBus transactions it
90 I2C_FUNC_SMBUS_EMUL includes all the SMBus transactions (with the
91 addition of I2C block transactions) which i2c-core can emulate using
117 and SMBus word data transactions. If not, then the driver won't work on
129 i2c-core will transparently implement SMBus transactions on top of I2C
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| D | i2c-address-translators.rst | 15 forwards transactions from upstream to the appropriate downstream port
34 all I2C transactions directed to devices on the child buses.
51 each other. The ATR receives the transactions initiated on bus A and
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| /Documentation/devicetree/bindings/usb/ |
| D | chipidea,usb2-common.yaml | 114 if the total of packet size for previous transactions are more than
115 256 bytes, it can't accept any transactions within this frame. The
119 handle more transactions than above case, it can accept transactions
123 transactions, but less frame rate.
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-atr.yaml | 15 forwards transactions from upstream to the appropriate downstream port
28 remote peripheral is assigned an alias from the pool, and transactions to
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| D | i2c-mux-gpmux.yaml | 52 Explicitly allow unrelated I2C transactions on the parent I2C adapter at
59 However, I2C transactions to devices behind all I2C multiplexers connected
64 This means that no unrelated I2C transactions are allowed on the parent I2C
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| /Documentation/devicetree/bindings/iommu/ |
| D | apple,sart.yaml | 13 Apple SART is a simple address filter for DMA transactions. Regions of
17 transactions of a single device are subject to SART filtering.
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| /Documentation/arch/powerpc/ |
| D | transactional_memory.rst | 17 instructions are presented to delimit transactions; transactions are
72 - See the ISA for full documentation of everything that will abort transactions.
90 Care must be taken when relying on syscalls to abort during active transactions
100 Delivery of signals (both sync and async) during transactions provides a second
103 abort transactions. The usual ucontext_t passed to the signal handler
120 However, basic signal handlers don't need to be aware of transactions
203 in parts within transactions.
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| /Documentation/filesystems/ |
| D | journalling.rst | 31 transactions in the journal and similarly jbd2_journal_load() will
39 by wrapping them into transactions. Additionally you also need to wrap
67 checkpoint all your transactions.
78 journal. Since transactions can't be nested/batched across differing
85 for transactions to complete and be committed from other tasks, so
191 as a whole, and those which are used to manage transactions
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| /Documentation/driver-api/pci/ |
| D | p2pdma.rst | 10 make P2P transactions tricky to do in a perfectly safe way.
13 transactions between hierarchy domains, and in PCIe, each Root Port
19 domain, and the spec guarantees that all transactions within the
24 memory that is used for P2P transactions needs to be backed by struct
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| /Documentation/admin-guide/perf/ |
| D | alibaba_pmu.rst | 45 receives transactions Host Interface (HIF) which is custom-defined by Synopsys.
46 These transactions are queued internally and scheduled for access while
48 dependencies between the transactions. The DDRCTL in turn issues commands on
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| /Documentation/devicetree/bindings/ata/ |
| D | snps,dwc-ahci-common.yaml | 98 description: Maximal size of Tx DMA transactions in FIFO words
103 description: Maximal size of Rx DMA transactions in FIFO words
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| /Documentation/i2c/busses/ |
| D | i2c-viapro.rst | 73 VT8231), this driver supports I2C block transactions. Such transactions
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| /Documentation/usb/ |
| D | ehci.rst | 23 (TT) in the hub, which turns low or full speed transactions into
24 high speed "split transactions" that don't waste transfer bandwidth.
88 transactions (interrupt and isochronous transfers). These place some
89 limits on the number of periodic transactions that can be scheduled,
182 so that it's only trying six (or maybe seven) USB transactions each
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| /Documentation/hwmon/ |
| D | lm90.rst | 510 * SMBus PEC support for Write Byte and Receive Byte transactions.
515 * SMBus PEC support for Write Byte and Receive Byte transactions.
612 not support PEC on all transactions though, so some care must be taken.
623 These transactions will be used to read register values, instead of
630 on SMBus Send Byte transactions in the lm90 driver.
632 PEC on byte data transactions represents a significant increase in bandwidth
635 two transactions will typically mean twice as much delay waiting for
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | marvell,icu.txt | 7 requests on input wires to MSG memory mapped transactions to the GIC.
41 transactions.
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