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/Documentation/ABI/testing/
Ddebugfs-cros-ec40 Some ECs have a feature where they will track transitions to
44 transitions that occurred. The last_resume_result file returns
48 transitions that occurred since the suspend message was
50 system due to a timeout when watching for SLP_S0 transitions.
53 transitions have been attempted, or the EC does not support
62 Some ECs have a feature where they will track transitions of
Dsysfs-class-thermal253 transitions. The cat output here is a two dimensional matrix,
255 of transitions from State_i to State_j. If the transition
/Documentation/arch/x86/x86_64/
Dfred.rst10 The FRED architecture defines simple new transitions that change
11 privilege level (ring transitions). The FRED architecture was
17 latency transitions.
23 The new transitions defined by the FRED architecture are FRED event
29 event delivery and the FRED return instructions are FRED transitions.
31 In addition to these transitions, the FRED architecture defines a new
34 not use the new FRED transitions.
/Documentation/cpu-freq/
Dcpufreq-stats.rst44 about the frequency transitions before the stats driver insertion.
83 This gives the total number of frequency transitions on this CPU. The cat
85 transitions.
95 transitions. The cat output here is a two dimensional matrix, where an entry
96 <i,j> (row i, column j) represents the count of number of transitions from
/Documentation/trace/
Devents-power.rst5 The power tracing system captures events related to power transitions
11 - Power domains related changes and transitions
64 The power domain events are used for power domains transitions
/Documentation/arch/arm/
Dcluster-pm-race-avoidance.rst134 Transitions between states occur as follows.
263 Transitions -----> can only be made by the outbound CPU, and
266 Transitions ===##> can only be made by the inbound CPU, and only
292 Details of the allowable transitions follow.
381 transitions to INBOUND_COMING_UP. Alternatively, individual
495 A CPU transitions to CPU_COMING_UP and then to CPU_UP via the
501 handle transitions from CLUSTER_UP to CLUSTER_GOING_DOWN
507 is needed for safe transitions at the cluster level.
509 A cluster transitions from CLUSTER_DOWN back to CLUSTER_UP via
/Documentation/core-api/
Dentry.rst4 All transitions between execution domains require state updates which are
56 state transitions must run with interrupts disabled.
126 Do not nest KVM entry/exit transitions because doing so is nonsensical.
132 and KVM transitions.
209 NMIs and other NMI-like exceptions handle state transitions without
/Documentation/admin-guide/LSM/
DSafeSetID.rst5 UID/GID transitions from a given UID/GID to only those approved by a
57 to do process spawning and UID/GID transitions). Unfortunately, there are a
90 None of the other in-tree LSMs have the capability to gate setid transitions, or
99 This LSM hooks the setid syscalls to make sure transitions are allowed if an
/Documentation/hwmon/
Dpm6764tr.rst29 The PM6764TR supports power state transitions featuring VFDE, and programmable DPM
/Documentation/devicetree/bindings/arm/freescale/
Dfsl,imx7ulp-pm.yaml15 monitors events to trigger transitions between power modes while
/Documentation/admin-guide/blockdev/drbd/
Dfigures.rst17 Sub graphs of DRBD's state transitions
/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra-ccplex-cluster.yaml17 registers that initiate CPU frequency/voltage transitions.
/Documentation/admin-guide/hw-vuln/
Dcross-thread-rsb.rst9 transitions out of C0 state, the other sibling thread could use return target
43 When the thread re-enters the C0 state, the processor transitions back
Dsrso.rst67 not address User->Kernel and Guest->Host transitions protection but it
89 User->Kernel and Guest->Host transitions protection.
103 transitions only.
/Documentation/devicetree/bindings/regulator/
Drohm,bd96801-regulator.yaml58 Keep the regulator powered when PMIC transitions to STBY state.
/Documentation/devicetree/bindings/interconnect/
Dqcom,bcm-voter.yaml31 WAKE/SLEEP TCSs are triggered when the RSC transitions between active and
/Documentation/timers/
Dno_hz.rst152 2. The user/kernel transitions are slightly more expensive due
226 * Dyntick-idle slows transitions to and from idle slightly.
250 * Adaptive-ticks slows user/kernel transitions slightly.
252 workloads, which have few such transitions. Careful benchmarking
/Documentation/devicetree/bindings/display/tilcdc/
Dpanel.txt7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
/Documentation/features/sched/membarrier-sync-core/
Darch-support.txt24 # uthread->uthread and kthread->uthread transitions) before returning
/Documentation/misc-devices/
Dtps6594-pfsm.rst19 The PFSM driver can be used to trigger transitions between configured
/Documentation/devicetree/bindings/opp/
Dti,omap-opp-supply.yaml20 transitions, we can use the multi-regulator support implemented by
/Documentation/power/
Ddrivers-testing.rst11 resume transitions in a driver, it is necessary to suspend and resume a fully
/Documentation/driver-api/pm/
Ddevices.rst63 transitions (suspend or hibernation).
106 transitions.
214 system-wide power transitions. In particular, the device can (and in the
711 callbacks that are executed for the given device during all power transitions,
766 or ``->poweroff`` callback for transitions related to hibernation) of either the
812 system transitions to the working state, especially if those devices had been in
819 after system-wide PM transitions to the working state. Whether or not that is
822 In particular, the "thaw" and "restore" transitions related to hibernation are
833 "suspend" phase of suspend-type transitions. If the driver or the middle layer
855 system-wide resume-type transitions.]
/Documentation/arch/x86/
Dsgx.rst82 power transitions when the ephemeral key that encrypts enclave memory is lost.
124 handle the actual transitions. This is roughly analogous to how glibc
133 vDSO function wraps low-level transitions to/from the enclave like EENTER and
/Documentation/admin-guide/pm/
Dsleep-states.rst60 are suspended during transitions into this state. For this reason, it should
82 are also carried out during transitions to S2RAM. Additional operations may
85 step during S2RAM transitions and that usually results in powering down some

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