Searched +full:tx +full:- +full:delay +full:- +full:ps (Results 1 – 23 of 23) sorted by relevance
| /Documentation/devicetree/bindings/net/dsa/ |
| D | nxp,sja1105.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at 16 - Vladimir Oltean <vladimir.oltean@nxp.com> 21 - nxp,sja1105e 22 - nxp,sja1105t 23 - nxp,sja1105p 24 - nxp,sja1105q 25 - nxp,sja1105r [all …]
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| D | vitesse,vsc73xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 13 The Vitesse DSA Switches were produced in the early-to-mid 2000s. 19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch 20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch 21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch 22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch 27 reside inside a SPI bus device tree node, see spi/spi-bus.txt [all …]
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| D | microchip,lan937x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - UNGLinuxDriver@microchip.com 13 - $ref: dsa.yaml#/$defs/ethernet-ports 18 - microchip,lan9370 19 - microchip,lan9371 20 - microchip,lan9372 21 - microchip,lan9373 22 - microchip,lan9374 [all …]
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| D | realtek.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: dsa.yaml#/$defs/ethernet-ports 13 - Linus Walleij <linus.walleij@linaro.org> 20 The SMI "Simple Management Interface" is a two-wire protocol using 21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does 23 SMI-based Realtek devices. The realtek-smi driver is a platform driver 26 The MDIO-connected switches use MDIO protocol to access their registers. 27 The realtek-mdio driver is an MDIO driver and it must be inserted inside [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 4 to clock delays. You can specify clock delay values in the PHY OF 8 Note that these settings are applied after any phy-specific fixup from 15 value is 0, the maximum value is 3000, and it can be specified in 200ps 17 skew values actually increase in 120ps steps, starting from -840ps. The 23 The following table shows the actual skew delay you will get for each of the 27 Device Tree Value Delay Pad Skew Register Value 28 ----------------------------------------------------- 29 0 -840ps 0000 30 200 -720ps 0001 31 400 -600ps 0010 [all …]
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| D | adi,adin.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandru Tachici <alexandru.tachici@analog.com> 16 - $ref: ethernet-phy.yaml# 19 adi,rx-internal-delay-ps: 21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with 22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. 26 adi,tx-internal-delay-ps: 28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with [all …]
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| D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-phy.yaml# 14 - Andrew Davis <afd@ti.com> 17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX [all …]
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| D | amlogic,meson-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 20 - amlogic,meson6-dwmac 21 - amlogic,meson8b-dwmac 22 - amlogic,meson8m2-dwmac 23 - amlogic,meson-gxbb-dwmac [all …]
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| D | ti,dp83822.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Andrew Davis <afd@ti.com> 14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It 16 data over standard, twisted-pair cables or to connect to an external, 17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to 24 - $ref: ethernet-phy.yaml# 30 ti,link-loss-low: 39 ti,fiber-mode: [all …]
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| D | apm-xgene-enet.txt | 1 APM X-Gene SoC Ethernet nodes 3 Ethernet nodes are defined to describe on-chip ethernet interfaces in 4 APM X-Gene SoC. 7 - compatible: Should state binding information from the following list, 8 - "apm,xgene-enet": RGMII based 1G interface 9 - "apm,xgene1-sgenet": SGMII based 1G interface 10 - "apm,xgene1-xgenet": XFI based 10G interface 11 - reg: Address and length of the register set for the device. It contains the 12 information of registers in the same order as described by reg-names 13 - reg-names: Should contain the register set names [all …]
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| D | renesas,etheravb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E [all …]
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| D | renesas,ethertsn.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas Ethernet TSN End-station 10 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 14 Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY. 17 - $ref: ethernet-controller.yaml# 22 - enum: 23 - renesas,r8a779g0-ethertsn # R-Car V4H 24 - const: renesas,rcar-gen4-ethertsn [all …]
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| D | motorcomm,yt8xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Sae <frank.sae@motor-comm.com> 13 - $ref: ethernet-phy.yaml# 18 - ethernet-phy-id4f51.e91a 19 - ethernet-phy-id4f51.e91b 21 rx-internal-delay-ps: 23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with 24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. [all …]
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-gmac 19 - const: allwinner,sun8i-v3s-emac [all …]
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| D | ingenic,mac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 18 - ingenic,jz4775-mac 19 - ingenic,x1000-mac 20 - ingenic,x1600-mac 21 - ingenic,x1830-mac 22 - ingenic,x2000-mac 30 interrupt-names: [all …]
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| D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible 28 - $ref: snps,dwmac.yaml# [all …]
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| D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - David S. Miller <davem@davemloft.net> 19 local-mac-address: 22 $ref: /schemas/types.yaml#/definitions/uint8-array 26 mac-address: 31 local-mac-address property. 32 $ref: /schemas/types.yaml#/definitions/uint8-array [all …]
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| D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 14 # The dt-schema tools will generate a select statement first by using 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 24 - $nodename [all …]
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| D | fsl,fec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Wei Fang <wei.fang@nxp.com> 12 - NXP Linux Team <linux-imx@nxp.com> 15 - $ref: ethernet-controller.yaml# 20 - enum: 21 - fsl,imx25-fec 22 - fsl,imx27-fec [all …]
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| D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
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| /Documentation/networking/ |
| D | pktgen.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel 15 ps aux | grep pkt 31 overload type of benchmarking, as this could hurt the normal use-case. 33 Specifically increasing the TX ring buffer in the NIC:: 35 # ethtool -G ethX tx 1024 37 A larger TX ring can improve pktgen's performance, while it can hurt 38 in the general case, 1) because the TX ring buffer might get larger 43 TX ring cause delay. Drivers usually delay cleaning up the 44 ring-buffers for various performance reasons, and packets stalling [all …]
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| D | can.rst | 2 SocketCAN - Controller Area Network 20 .. _socketcan-motivation: 29 functionality. Usually, there is only a hardware-specific device 32 Queueing of frames and higher-level transport protocols like ISO-TP 34 character-device implementations support only one single process to 47 protocol family module and also vice-versa. Also, the protocol family 57 communicate using a specific transport protocol, e.g. ISO-TP, just 60 CAN-IDs, frames, etc. 62 Similar functionality visible from user-space could be provided by a 74 * **Abstraction:** In most existing character-device implementations, the [all …]
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 16 force -- enable ACPI if default was off 17 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 18 off -- disable ACPI if default was on 19 noirq -- do not use ACPI for IRQ routing 20 strict -- Be less tolerant of platforms that are not 22 rsdt -- prefer RSDT over (default) XSDT 23 copy_dsdt -- copy DSDT to memory 24 nospcr -- disable console in ACPI SPCR table as 41 If set to vendor, prefer vendor-specific driver 73 Documentation/firmware-guide/acpi/debug.rst for more information about [all …]
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