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/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml25 u3 port0 0x0900 U3PHYD
30 u3 port1 0x1100 U3PHYD
42 u3 port0 0x0700 SPLLC
51 u3 port1 0x1700 SPLLC
60 SPLLC shared by u3 ports and FMREG shared by u2 ports on V1 are put back
61 into each port; a new bank MISC for u2 ports and CHIP for u3 ports are
171 - description: internal R efuse for U2 PHY or U3/PCIe PHY
172 - description: rx_imp_sel efuse for U3/PCIe PHY
173 - description: tx_imp_sel efuse for U3/PCIe PHY
176 Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
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Dmediatek,xsphy.yaml56 Register shared by multiple U3 ports, exclude port's private register,
134 The selection of Internal Resistor (U2/U3 phy)
141 The selection of TX Impedance (U3 phy)
148 The selection of RX Impedance (U3 phy)
Dphy-rockchip-naneng-combphy.yaml46 The option SSC can be enabled for U3, SATA and PCIE.
/Documentation/ABI/testing/
Dsysfs-bus-usb-lvstest39 Write to this node to issue "U3 entry" for Link Layer
46 Write to this node to issue "U3 exit" for Link Layer
/Documentation/devicetree/bindings/
Dincomplete-devices.yaml139 - u3-agp
140 - u3-dart
141 - u3-ht
/Documentation/devicetree/bindings/sound/
Dsamsung,odroid.yaml57 For Odroid U3, XU3: "Headphone Jack", "Speakers"
/Documentation/devicetree/bindings/arm/samsung/
Dsamsung-boards.yaml89 - hardkernel,odroid-u3 # Hardkernel Odroid U3
/Documentation/admin-guide/media/
Dem28xx-cardlist.rst202 - Compro, VideoMate U3
Dcec.rst230 adapters can support this. An example is the Odroid-U3 SBC that has a
/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml85 power mode (U3).
/Documentation/driver-api/usb/
Ddwc3.rst211 ``U2``, ``U3``, ``SS.Disabled``, ``RX.Detect``, ``SS.Inactive``,
/Documentation/networking/
Darcnet-hardware.rst1048 | U3 SW 1 JP0 ###| Phone Jacks
1071 U3: Boot-ROM Socket