| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
36 mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig)
37 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
42 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
66 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
67 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
[all …]
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| D | marvell,armada-370-pinctrl.txt | 16 mpp0 0 gpio, uart0(rxd)
17 mpp1 1 gpo, uart0(txd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
43 mpp22 22 gpo, ge0(txd6), ge1(txd2), uart0(rts)
48 mpp27 27 gpio, ge0(rxd4), ge1(rxd2), uart0(cts)
59 mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts)
61 mpp40 40 gpio, dev(ad1), uart1(rts), uart0(rts)
[all …]
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| D | img,pistachio-pinctrl.txt | 108 mfio55 uart0, spim0, spim1
109 mfio56 uart0, spim0, spim1
110 mfio57 uart0, spim0, spim1
111 mfio58 uart0, spim1
183 uart0_xfer: uart0-xfer {
184 uart0-rxd {
186 function = "uart0";
188 uart0-txd {
190 function = "uart0";
194 uart0_rts_cts: uart0-rts-cts {
[all …]
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| D | berlin,pinctrl.txt | 38 uart0_pmux: uart0-pmux {
40 function = "uart0";
44 &uart0 {
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| D | nxp,lpc1850-scu.txt | 47 uart0_pins: uart0-pins {
50 function = "uart0";
57 function = "uart0";
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| D | axis,artpec6-pinctrl.txt | 37 uart0: uart0grp0, uart0grp1, uart0grp2
60 function = "uart0";
70 uart0: uart@f8036000 {
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| D | cnxt,cx92755-pinctrl.txt | 77 uart0: uart@f0000740 {
85 "client select" for the Rx and Tx signals of uart0. The uart0 node references
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| D | abilis,tb10x-iomux.txt | 34 - UART ports: uart0, uart1
58 pctl_uart0: pctl-uart0 {
59 abilis,function = "uart0";
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| D | mediatek,mt76x8-pinctrl.yaml | 42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
361 const: uart0
365 enum: [uart0]
429 enum: [i2c, spi cs1, uart0]
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| D | marvell,armada-375-pinctrl.txt | 32 mpp16 16 gpio, uart0(txd)
33 mpp17 17 gpio, uart0(rxd)
40 mpp24 24 gpio, led(p0), ge1(rxd0), sd(cmd), uart0(rts)
41 mpp25 25 gpio, led(p2), ge1(rxd1), sd(d0), uart0(cts)
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| D | marvell,armada-98dx3236-pinctrl.txt | 25 mpp11 11 gpio, uart1(rxd), uart0(cts), dev(ad13)
26 mpp12 12 gpo, uart1(txd), uart0(rts), dev(ad14)
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| D | sophgo,cv1800-pinctrl.yaml | 109 uart0_cfg: uart0-cfg {
110 uart0-pins {
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| D | bitmain,bm1880-pinctrl.txt | 74 i2c4, uart0, uart1, uart2, uart3, uart4, uart5, uart6, uart7,
120 pinctrl_uart0_default: uart0-default {
123 function = "uart0";
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| D | pinctrl_spear.txt | 128 "uart0", "timer_0_1", "timer_2_3"
146 "rgmii", "smii_0_1_2", "ras_mii_txclk", "nand", "keyboard", "uart0",
153 "pwm", "vip", "cam0", "cam1", "cam2", "cam3", "smi", "ssp0", "uart0",
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| /Documentation/devicetree/bindings/sifive/ |
| D | sifive-blocks-ip-versioning.txt | 12 An example is "sifive,uart0" from:
23 "sifive,uart0" to indicate that their driver is compatible with the
33 IP block-specific compatible string (such as "sifive,uart0") should
38 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | cp110-system-controller.txt | 91 mpp0 0 gpio, dev(ale1), au(i2smclk), ge0(rxd3), tdm(pclk), ptp(pulse), mss_i2c(sda), uart0(rxd), sa…
92 mpp1 1 gpio, dev(ale0), au(i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), …
97 …1), ge0(txd3), spi0(csn2), au(i2sextclk), sata1(present_act), pcie2(clkreq), uart0(rxd), ptp(pulse)
98 mpp7 7 gpio, dev(ad10), ge0(txd2), spi0(csn1), spi1(csn1), sata0(present_act), led(data), uart0(txd…
99 mpp8 8 gpio, dev(ad9), ge0(txd1), spi0(csn0), spi1(csn0), uart0(cts), led(stb), uart2(rxd), ptp(pcl…
101 mpp10 10 gpio, dev(readyn), ge0(txctl), spi0(miso), spi1(miso), uart0(cts), sata1(present_act)
102 mpp11 11 gpio, dev(wen1), ge0(txclkout), spi0(clk), spi1(clk), uart0(rts), led(clk), uart2(txd), sa…
118 …i1(miso), mss_gpio4, ge0(rxd3), spi0(csn4), ge(mdio), sata0(present_act), uart0(rts), rei(in_cp2cp)
119 …e0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act), uart0(cts), led(data)
120 …(rxd1), spi0(csn6), pcie1(clkreq), ptp(clk), mss_i2c(sda), sata0(present_act), uart0(rxd), led(stb)
[all …]
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| /Documentation/devicetree/bindings/serial/ |
| D | digicolor-usart.txt | 19 serial0 = &uart0;
22 uart0: uart@f0000740 {
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| D | sunplus,sp7021-uart.yaml | 45 serial0 = &uart0;
48 uart0: serial@9c000900 {
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| D | sifive-serial.yaml | 24 - const: sifive,uart0
58 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
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| D | arm,mps2-uart.txt | 14 uart0: serial@40004000 {
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| D | litex,liteuart.yaml | 36 uart0: serial@e0001800 {
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| /Documentation/devicetree/bindings/reset/ |
| D | zynq-reset.txt | 51 320: uart0 reset
53 322: uart0 ref reset
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| /Documentation/w1/masters/ |
| D | w1-uart.rst | 46 onewire to the serial node (e.g. uart0). For example:
49 @uart0 {
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| /Documentation/devicetree/bindings/clock/ |
| D | zynq-7000.txt | 64 23: uart0
100 "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
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| D | img,boston-clock.txt | 28 uart0: uart@17ffe000 {
|