Searched +full:usb2 +full:- +full:0 (Results 1 – 25 of 121) sorted by relevance
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| /Documentation/devicetree/bindings/phy/ |
| D | renesas,usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car generation 3 USB 2.0 PHY 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - items: 16 - enum: 17 - renesas,usb2-phy-r8a77470 # RZ/G1C 18 - renesas,usb2-phy-r9a08g045 # RZ/G3S [all …]
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| D | phy-hisi-inno-usb2.txt | 1 Device tree bindings for HiSilicon INNO USB2 PHY 4 - compatible: Should be one of the following strings: 5 "hisilicon,inno-usb2-phy", 6 "hisilicon,hi3798cv200-usb2-phy". 7 - reg: Should be the address space for PHY configuration register in peripheral 9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device 11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset 13 - #address-cells: Must be 1. 14 - #size-cells: Must be 0. 16 The INNO USB2 PHY device should be a child node of peripheral controller that [all …]
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| D | ti,omap-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP USB2 PHY 10 - Kishon Vijay Abraham I <kishon@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - items: 17 - enum: 18 - ti,dra7x-usb2 [all …]
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| D | socionext,uniphier-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Socionext UniPhier USB2 PHY 11 USB2 controller implemented on Socionext UniPhier SoCs. 12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3 13 controller doesn't include its own High-Speed PHY. This needs to specify 14 USB2 PHY instead of USB3 HS-PHY. 17 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> [all …]
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| D | amlogic,meson8b-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/amlogic,meson8b-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 15 - items: 16 - enum: 17 - amlogic,meson8-usb2-phy 18 - amlogic,meson8b-usb2-phy [all …]
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| D | samsung,usb2-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 18 0 - USB device ("device"), 19 1 - USB host ("host"), 20 2 - HSIC0 ("hsic0"), [all …]
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| D | phy-lantiq-rcu-usb2.txt | 9 ------------------------------------------------------------------------------- 11 - compatible : Should be one of 12 "lantiq,ase-usb2-phy" 13 "lantiq,danube-usb2-phy" 14 "lantiq,xrx100-usb2-phy" 15 "lantiq,xrx200-usb2-phy" 16 "lantiq,xrx300-usb2-phy" 17 - reg : Defines the following sets of registers in the parent 19 - Offset of the USB PHY configuration register 20 - Offset of the USB Analog configuration [all …]
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| D | amlogic,g12a-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/amlogic,g12a-usb2-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic G12A USB2 PHY 11 - Neil Armstrong <neil.armstrong@linaro.org> 16 - amlogic,g12a-usb2-phy 17 - amlogic,a1-usb2-phy 25 clock-names: 27 - const: xtal [all …]
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| D | st,stih407-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/st,stih407-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Patrice Chotard <patrice.chotard@foss.st.com> 13 The USB picoPHY device is the PHY for both USB2 and USB3 host controllers 14 (when controlling usb2/1.1 devices) available on STiH407 SoC family from 19 const: st,stih407-usb2-phy 23 $ref: /schemas/types.yaml#/definitions/phandle-array 25 - items: [all …]
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| D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| D | amlogic,meson-gxl-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/amlogic,meson-gxl-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson GXL USB2 PHY 10 - Neil Armstrong <neil.armstrong@linaro.org> 14 const: amlogic,meson-gxl-usb2-phy 22 clock-names: 24 - const: phy 29 reset-names: [all …]
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| D | nuvoton,ma35d1-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/nuvoton,ma35d1-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Nuvoton MA35D1 USB2 phy 10 - Hui-Ping Chen <hpchen0nvt@gmail.com> 15 - nuvoton,ma35d1-usb2-phy 17 "#phy-cells": 18 const: 0 29 - compatible [all …]
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| D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| D | brcm,kona-usb2-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/brcm,kona-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Florian Fainelli <f.fainelli@gmail.com> 14 const: brcm,kona-usb2-phy 19 '#phy-cells': 20 const: 0 23 - compatible 24 - reg [all …]
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| /Documentation/admin-guide/media/ |
| D | usb-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 19 ``uvc-driver``. 23 card lists for such vendor-class devices. 35 some of the drivers have sub-drivers, not shown at this table. 36 In particular, gspca driver has lots of sub-drivers, 38 as shown at :doc:`gspca card list <gspca-cardlist>`. 45 b2c2-flexcop-usb Technisat/B2C2 Air/Sky/Cable2PC USB 47 dvb-as102 Abilis AS102 DVB receiver 48 dvb-ttusb-budget Technotrend/Hauppauge Nova - USB devices 49 dvb-usb-a800 AVerMedia AverTV DVB-T USB 2.0 (A800) [all …]
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| D | dvb-usb-dw2102-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-dw2102 cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - DVBWorld DVB-C 3101 USB2.0 16 - 04b4:3101 17 * - DVBWorld DVB-S 2101 USB2.0 [all …]
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| D | dvb-usb-dibusb-mc-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-dibusb-mc cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - Artec T1 USB2.0 TVBOX (please check the warm ID) 16 - 05d8:8109, 05d8:810a 17 * - Artec T14 - USB2.0 DVB-T [all …]
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| D | dvb-usb-m920x-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-m920x cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - DTV-DVB UDTT7049 16 - 13d3:3219 17 * - Dposh DVB-T USB2.0 [all …]
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| D | dvb-usb-gl861-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-gl861 cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - 774 Friio White ISDB-T USB2.0 16 - 7a69:0001 17 * - A-LINK DTU DVB-T USB2.0 [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in [all …]
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| D | xlnx,usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/xlnx,usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mubin Sayyed <mubin.sayyed@amd.com> 11 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> 15 const: xlnx,usb2-device-4.00.a 23 xlnx,has-builtin-dma: 31 clock-names: 35 - compatible [all …]
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| D | nvidia,tegra210-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces 18 const: nvidia,tegra210-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers [all …]
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| D | nvidia,tegra194-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces 18 const: nvidia,tegra194-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers [all …]
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| D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: USB2 ChipIdea USB controller 10 - Xu Yang <xu.yang_2@nxp.com> 11 - Peng Fan <peng.fan@nxp.com> 16 - enum: 17 - chipidea,usb2 18 - lsi,zevio-usb [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | renesas,rcar-usb2-clock-sel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car USB 2.0 clock selector 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 19 Case 1: An external clock connects to R-Car SoC 20 +----------+ +--- R-Car ---------------------+ 21 |External |---|USB_EXTAL ---> all usb channels| 23 +----------+ +-------------------------------+ [all …]
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