Searched +full:usb3 +full:- +full:phy0 (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 26 host-only mode. [all …]
|
| /Documentation/devicetree/bindings/clock/ |
| D | qcom,ipq9574-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 18 include/dt-bindings/clock/qcom,ipq9574-gcc.h 19 include/dt-bindings/reset/qcom,ipq9574-gcc.h 23 const: qcom,ipq9574-gcc 27 - description: Board XO source [all …]
|
| D | qcom,ipq5018-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sricharan Ramabadhran <quic_srichara@quicinc.com> 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 26 - description: Board XO source 27 - description: Sleep clock source [all …]
|