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Searched full:usbphy (Results 1 – 19 of 19) sorted by relevance

/Documentation/devicetree/bindings/phy/
Dfsl,mxs-usbphy.yaml4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml#
16 - fsl,imx23-usbphy
17 - fsl,imx7ulp-usbphy
18 - fsl,vf610-usbphy
21 - fsl,imx28-usbphy
22 - fsl,imx6ul-usbphy
23 - fsl,imx6sl-usbphy
24 - fsl,imx6sx-usbphy
25 - fsl,imx6q-usbphy
26 - const: fsl,imx23-usbphy
[all …]
Dmediatek,mt7628-usbphy.yaml4 $id: http://devicetree.org/schemas/phy/mediatek,mt7628-usbphy.yaml#
15 - mediatek,mt7620-usbphy
16 - mediatek,mt7628-usbphy
17 - ralink,rt3352-usbphy
52 const: mediatek,mt7628-usbphy
65 compatible = "mediatek,mt7628-usbphy";
Dkeystone-usb-phy.txt4 - compatible: should be "ti,keystone-usbphy".
15 compatible = "ti,keystone-usbphy";
Drockchip-usb-phy.yaml69 usbphy: usbphy {
Dphy-hi6220-usb.txt11 usb_phy: usbphy {
Dphy-pxa-usb.txt10 usb-phy: usbphy@d4207000 {
Dmarvell,pxa1928-usb-phy.yaml42 usbphy: phy@7000 {
Dphy-bindings.txt65 phy-names = "usbphy";
Dallwinner,sun4i-a10-usb-phy.yaml91 usbphy: phy@1c13400 {
/Documentation/devicetree/bindings/reset/
Drenesas,rzg2l-usbphy-ctrl.yaml4 $id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#
7 title: Renesas RZ/{G2L,V2L} USBPHY Control
13 The RZ/G2L USBPHY Control mainly controls reset and power down of the
20 - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
21 - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
22 - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
23 - const: renesas,rzg2l-usbphy-ctrl
66 phyrst: usbphy-ctrl@11c40000 {
67 compatible = "renesas,r9a07g044-usbphy-ctrl",
68 "renesas,rzg2l-usbphy-ctrl";
/Documentation/devicetree/bindings/usb/
Dbrcm,bcm7445-ehci.yaml36 const: usbphy
54 phy-names = "usbphy";
Dallwinner,sun4i-a10-musb.yaml100 phys = <&usbphy 0>;
102 extcon = <&usbphy 0>;
Dchipidea,usb2-imx.yaml131 fsl,usbphy:
253 fsl,usbphy = <&usbphynop1>;
268 fsl,usbphy = <&usbphynop1>;
Dgeneric-ohci.yaml176 phys = <&usbphy 1>;
Dgeneric-ehci.yaml182 phys = <&usbphy 1>;
Ddwc2.yaml201 phys = <&usbphy>;
/Documentation/devicetree/bindings/clock/
Drockchip,rv1108-cru.yaml30 - "usbphy" - external clock input derived from USB PHY - optional
/Documentation/usb/
Dchipidea.rst121 echo enabled > /sys/bus/platform/devices/20c9000.usbphy/power/wakeup
/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml151 usbphy: