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/Documentation/devicetree/bindings/pci/
Daltr,msi-controller.yaml21 - description: Vectors slave port region
33 num-vectors:
34 description: number of vectors
45 - num-vectors
64 num-vectors = <32>;
Dmediatek-pcie-gen3.yaml16 This PCIe controller supports up to 256 MSI vectors, the MSI hardware
37 | | | | | | | | | | | | (MSI vectors)
42 With 256 MSI vectors supported, the MSI vectors are composed of 8 sets,
43 each set has its own address for MSI message, and supports 32 MSI vectors
/Documentation/arch/x86/
Delf_auxvec.rst4 x86-specific ELF Auxiliary Vectors
7 This document describes the semantics of the x86 auxiliary vectors.
12 ELF Auxiliary vectors enable the kernel to efficiently provide
40 The exposed auxiliary vectors
Dentry_64.rst107 We try to only use IST entries and the paranoid entry code for vectors
/Documentation/PCI/
Dmsi-howto.rst93 To automatically use MSI or MSI-X interrupt vectors, use the following
99 which allocates up to max_vecs interrupt vectors for a PCI device. It
100 returns the number of vectors allocated or a negative error. If the device
101 has a requirements for a minimum number of vectors the driver can pass a
103 if it can't meet the minimum number of vectors.
112 vectors, use the following function::
125 MSI interrupt vectors must be allocated consecutively, so the system might
126 not be able to allocate as many vectors for MSI as it could for MSI-X. On
133 The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
137 vectors supported beforehand::
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Dmti,gic.yaml40 mti,reserved-cpu-vectors:
42 Specifies the list of CPU interrupt vectors to which the GIC may not
53 mti,reserved-ipi-vectors:
115 mti,reserved-cpu-vectors = <7>;
116 mti,reserved-ipi-vectors = <40 8>;
Dloongson,pch-msi.yaml34 u32 value of the number of parent HyperTransport vectors allocated
/Documentation/virt/kvm/arm/
Dhyp-abi.rst34 r1/x1 = vectors
36 Set HVBAR/VBAR_EL2 to 'vectors' to enable a hypervisor. 'vectors'
/Documentation/filesystems/xfs/
Dxfs-delayed-logging-design.rst466 simply copies the memory these vectors point to into the log buffer during
515 buffer is to support splitting vectors across log buffer boundaries correctly.
526 handled in exactly the same manner as the existing log vectors are handled.
601 items are stored as log vectors, we can use the existing log buffer writing
605 way it separates the writing of the transaction contents (the log vectors) from
628 to store the list of log vectors that need to be written into the transaction.
629 Hence log vectors need to be able to be chained together to allow them to be
690 efficient way to track vectors, even though it seems like the natural way to do
692 vectors and break the link between the log item and the log vector means that
694 the log vector chaining. If we track by the log vectors, then we only need to
[all …]
/Documentation/crypto/
Dapi-intro.rst10 The Scatterlist Crypto API takes page vectors (scatterlists) as
27 of the implementation logic (e.g. manipulating page vectors) and provide an
104 is that at least a few test vectors from known sources (preferably
/Documentation/admin-guide/hw-vuln/
Dsrso.rst68 does address User->User and VM->VM attack vectors.
137 attack vectors, including the local User->Kernel one.
143 new attack vectors appear.
Dspectre.rst150 not cover all possible attack vectors.
353 and there is no guarantee that all possible attack vectors for Spectre
466 not cover all attack vectors for Spectre variant 1.
568 1 attack vectors.
/Documentation/security/
Dsnp-tdx-threat-model.rst19 additional attack vectors that arise in the confidential computing space
92 | vectors | +-------------------+
118 Regarding external attack vectors, it is interesting to note that in most
145 | vectors | | +-------------------+ |
240 side-channel and/or transient execution attack vectors.
/Documentation/arch/arm64/
Dsme.rst69 vectors from 0 to VL/8-1 stored in the same endianness invariant format as is
70 used for SVE vectors.
79 controls the size of the streaming mode SVE vectors and the ZA matrix array.
138 * The matrix is stored as a series of horizontal vectors in the same format as
139 is used for SVE vectors.
/Documentation/devicetree/bindings/powerpc/
Dibm,powerpc-cpu-features.txt181 hardware capability vectors in order to advertise this feature to userspace.
183 to 0-31 in AT_HWCAP2 vector, and so on. Missing AT_HWCAPx vectors implies
/Documentation/filesystems/nfs/
Dpnfs.rst67 of these types there is a layout-driver with a common function-vectors
/Documentation/admin-guide/device-mapper/
Ddm-io.rst37 The second I/O service type takes an array of bio vectors as the data buffer
/Documentation/tee/
Dop-tee.rst111 There are additional attack vectors/mitigations for the kernel that should be
138 vectors are opened up. This should include mounting of any modifiable
/Documentation/translations/zh_CN/core-api/irq/
Dirq-domain.rst200 CPU Vector irq_domain (root irq_domain to manage CPU vectors)
/Documentation/mm/
Dallocation-profiling.rst72 separately: for example, slab object extension vectors, or when the slab
/Documentation/arch/arm/
Dmemory.rst34 The CPU vectors are mapped here if the
/Documentation/arch/sparc/
Dadi.rst46 info. Following auxiliary vectors are provided by the kernel:
144 trap is handled by hypervisor first and the hypervisor vectors this
/Documentation/ABI/testing/
Dsysfs-bus-pci458 It contains the total number of MSI-X vectors available for
462 constant and won't be changed after MSI-X vectors assignment.
469 It allows configuration of the number of MSI-X vectors for
471 vectors to optimally divide them between VFs based on VF usage.
/Documentation/driver-api/
Ds390-drivers.rst132 interrupts and interrupt vectors.
/Documentation/virt/hyperv/
Dvpci.rst219 running out of vectors on a CPU, there's no path to inform the
222 using all the vectors on a CPU doesn't happen. Since such a

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