Home
last modified time | relevance | path

Searched +full:versatile +full:- +full:pci (Results 1 – 5 of 5) sorted by relevance

/Documentation/devicetree/bindings/pci/
Dversatile.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/versatile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Versatile Platform Baseboard PCI interface
10 - Rob Herring <robh@kernel.org>
13 PCI host controller found on the ARM Versatile PB board's FPGA.
16 - $ref: /schemas/pci/pci-host-bridge.yaml#
20 const: arm,versatile-pci
24 - description: Versatile-specific registers
[all …]
/Documentation/devicetree/bindings/arm/
Darm,versatile.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Versatile Boards
10 - Linus Walleij <linus.walleij@linaro.org>
13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
14 with various pluggable interface boards, in essence the Versatile PB version
15 is a superset of the Versatile AB version.
17 The root node in the Versatile platforms must contain a core module child
[all …]
/Documentation/devicetree/bindings/clock/
Darm,syscon-icst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
25 connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
26 different values and sometimes also hard-wires the output divider. They
38 integratorap-cm
41 integratorap-sys
44 integratorap-pci 14 1 14
[all …]
/Documentation/mm/
Dmemory-model.rst1 .. SPDX-License-Identifier: GPL-2.0
23 Regardless of the selected memory model, there exists one-to-one
35 non-NUMA systems with contiguous, or mostly contiguous, physical
54 straightforward: `PFN - ARCH_PFN_OFFSET` is an index to the
63 SPARSEMEM is the most versatile memory model available in Linux and it
65 as hot-plug and hot-remove of the physical memory, alternative memory
66 maps for non-volatile memory devices and deferred initialization of
85 NR\_MEM\_SECTIONS = 2 ^ {(MAX\_PHYSMEM\_BITS - SECTION\_SIZE\_BITS)}
87 The `mem_section` objects are arranged in a two-dimensional array
104 corresponding `struct page` - a "classic sparse" and "sparse
[all …]
/Documentation/hwmon/
Dpmbus-core.rst9 power-management protocol with a fully defined command language that facilitates
11 protocol is implemented over the industry-standard SMBus serial interface and
12 enables programming, control, and real-time monitoring of compliant power
13 conversion products. This flexible and highly versatile standard allows for
18 promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters
22 commands, and manufacturers can add as many non-standard commands as they like.
23 Also, different PMBUs devices act differently if non-supported commands are
40 to PCI code, where generic code is augmented as needed with quirks for all kinds
43 PMBus device capabilities auto-detection
46 For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported
[all …]