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/Documentation/devicetree/bindings/mmc/
Dmmc-spi-slot.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 - $ref: mmc-controller.yaml
14 - $ref: /schemas/spi/spi-peripheral-props.yaml
21 const: mmc-spi-slot
29 voltage-ranges:
30 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
Dfsl,esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,mpc8536-esdhc
21 - fsl,mpc8378-esdhc
22 - fsl,p2020-esdhc
23 - fsl,p4080-esdhc
24 - fsl,t1040-esdhc
[all …]
Dsdhci-milbeaut.txt7 - compatible: "socionext,milbeaut-m10v-sdhci-3.0"
8 - clocks: Must contain an entry for each entry in clock-names. It is a
9 list of phandles and clock-specifier pairs.
10 See ../clocks/clock-bindings.txt for details.
11 - clock-names: Should contain the following two entries:
12 "iface" - clock used for sdhci interface
13 "core" - core clock for sdhci controller
16 - fujitsu,cmd-dat-delay-select: boolean property indicating that this host
21 compatible = "socionext,milbeaut-m10v-sdhci-3.0";
24 voltage-ranges = <3300 3300>;
[all …]
Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
[all …]
/Documentation/devicetree/bindings/iio/adc/
Dxlnx,zynqmp-ams.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
13 The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
14 that can be used to sample external voltages and monitor on-die operating
15 conditions, such as temperature and supply voltage levels.
27 …--------------------------------------------------------------------------------------------------…
28 AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage
[all …]
/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2672.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
11 - Kim Seer Paller <kimseer.paller@analog.com>
14 Analog Devices LTC2672 5 channel, 12-/16-Bit, 300mA DAC
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2672.pdf
20 - adi,ltc2672
25 spi-max-frequency:
28 vcc-supply:
[all …]
/Documentation/hwmon/
Dbt1-pvt.rst1 .. SPDX-License-Identifier: GPL-2.0-only
3 Kernel driver bt1-pvt
8 * Baikal-T1 PVT sensor (in SoC)
10 Prefix: 'bt1-pvt'
12 Addresses scanned: -
21 -----------
24 embedded into Baikal-T1 process, voltage and temperature sensors. PVT IP-core
25 consists of one temperature and four voltage sensors, which can be used to
26 monitor the chip internal environment like heating, supply voltage and
29 compile-time configurable due to the hardware interface implementation
[all …]
Dmax127.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
16 Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX127-MAX128.pdf
19 -----------
21 The MAX127 is a multirange, 12-bit data acquisition system (DAS) providing
23 a variety of ranges. The available ranges are {0,5V}, {0,10V}, {-5,5V}
24 and {-10,10V}.
26 The MAX127 features a 2-wire, I2C-compatible serial interface that allows
30 ---------------
33 in[0-7]_input The input voltage (in mV) of the corresponding channel.
36 in[0-7]_min The lower input limit (in mV) for the corresponding channel.
[all …]
Ddme1737.rst18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
46 Enables the monitoring of voltage, fan and temp inputs
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
[all …]
Dmax197.rst14 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX197.pdf
20 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX199.pdf
23 -----------
25 The A/D converters MAX197, and MAX199 are both 8-Channel, Multi-Range, 5V,
26 12-Bit DAS with 8+4 Bus Interface and Fault Protection.
28 The available ranges for the MAX197 are {0,-5V} to 5V, and {0,-10V} to 10V,
29 while they are {0,-2V} to 2V, and {0,-4V} to 4V on the MAX199.
32 -------------
40 On success, the function must return the 12-bit raw value read from the chip,
47 7,6 PD1,PD0 Clock and Power-Down modes
[all …]
/Documentation/devicetree/bindings/power/supply/
Drichtek,rt5033-charger.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
[all …]
/Documentation/devicetree/bindings/mfd/
Dstericsson,db8500-prcmu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit
10 - Linus Walleij <linus.walleij@linaro.org>
13 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
14 microprocessor that is embedded in the always-on power domain of the
20 pattern: '^prcmu@[0-9a-f]+$'
23 description: The device is compatible both to the device-specific
[all …]
Drichtek,rt5033.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
30 The regulators of RT5033 have to be instantiated under a sub-node named
31 "regulators". For SAFE_LDO voltage there is only one value of 4.9 V. LDO
32 voltage ranges from 1.2 V to 3.0 V in 0.1 V steps. BUCK voltage ranges
44 $ref: /schemas/power/supply/richtek,rt5033-charger.yaml#
47 - compatible
48 - reg
[all …]
Drohm,bd71815-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71815AGW is a single-chip power management ICs for battery-powered
15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
30 gpio-controller: true
32 "#gpio-cells":
[all …]
/Documentation/devicetree/bindings/regulator/
Dltc3676.txt1 Linear Technology LTC3676 8-output regulators
4 - compatible: "lltc,ltc3676"
5 - reg: I2C slave address
8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, sw4,
14 the resistor values of their external feedback voltage dividers:
17 - lltc,fb-voltage-divider: An array of two integers containing the resistor
18 values R1 and R2 of the feedback voltage divider in ohms.
21 412.5mV to 800mV in 12.5 mV steps. The output voltage thus ranges between
26 regulator can not be disabled and thus should have the regulator-always-on
37 regulator-min-microvolt = <674400>;
[all …]
Dltc3589.txt1 Linear Technology LTC3589, LTC3589-1, and LTC3589-2 8-output regulators
4 - compatible: "lltc,ltc3589", "lltc,ltc3589-1" or "lltc,ltc3589-2"
5 - reg: I2C slave address
8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, bb-out,
13 nodes for sw1, sw2, sw3, bb-out, ldo1, and ldo2 additionally need to specify
14 the resistor values of their external feedback voltage dividers:
17 - lltc,fb-voltage-divider: An array of two integers containing the resistor
18 values R1 and R2 of the feedback voltage divider in ohms.
21 0.3625 V to 0.75 V in 12.5 mV steps. The output voltage thus ranges between
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
[all …]
/Documentation/devicetree/bindings/phy/
Dmediatek,xsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
[all …]
Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy(@[0-9a-f]+)?$"
[all …]
/Documentation/devicetree/bindings/display/
Dste,mcde.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson Multi Channel Display Engine MCDE
10 - Linus Walleij <linus.walleij@linaro.org>
25 - description: MCDECLK (main MCDE clock)
26 - description: LCDCLK (LCD clock)
27 - description: PLLDSI (HDMI clock)
29 clock-names:
31 - const: mcde
[all …]
/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
[all …]
/Documentation/driver-api/
Dregulator.rst1 .. Copyright 2007-2008 Wolfson Microelectronics
8 Voltage and current regulator API
18 control voltage and current regulators.
22 both voltage regulators (where voltage output is controllable) and
30 --------
38 output voltage or current.
62 drivers use `get <#API-regulator-get>`__ and
63 `put <#API-regulator-put>`__ operations to acquire and release
64 regulators. Functions are provided to `enable <#API-regulator-enable>`__
65 and `disable <#API-regulator-disable>`__ the regulator and to get and
[all …]
/Documentation/devicetree/bindings/opp/
Dopp-v2-base.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
30 their DVFS state together, i.e. they share clock/voltage/current lines.
31 Missing property means devices have independent clock/voltage/current
[all …]
/Documentation/devicetree/bindings/pinctrl/
Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
[all …]
/Documentation/devicetree/bindings/usb/
Dti,am62-usb.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
10 - Aswath Govindraju <a-govindraju@ti.com>
14 const: ti,am62-usb
19 - description: USB CFG register space
20 - description: USB PHY2 register space
22 ranges: true
[all …]
Dti,j721e-usb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI wrapper module for the Cadence USBSS-DRD controller
10 - Roger Quadros <rogerq@kernel.org>
15 - const: ti,j721e-usb
16 - items:
17 - const: ti,am64-usb
18 - const: ti,j721e-usb
[all …]

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