Searched +full:vsync +full:- +full:active (Results 1 – 25 of 46) sorted by relevance
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | tvp7002.txt | 7 - compatible : Must be "ti,tvp7002" 10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when 13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when 16 - pclk-sample: Clock polarity of the bus. Default value when this property is 19 - sync-on-green-active: Active state of Sync-on-green signal property of the 21 0 = Normal Operation (Active Low, Default) 24 - field-even-active: Active-high Field ID output polarity control of the bus. 27 0 = Normal Operation (Active Low, Default) 31 video-interfaces.txt. 44 hsync-active = <1>; [all …]
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| D | ov7670.txt | 8 - compatible: should be "ovti,ov7670" 9 - clocks: reference to the xclk input clock. 10 - clock-names: should be "xclk". 13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively. 14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. 17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any. 18 Active is low. 19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. 20 Active is high. 21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output [all …]
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| D | tvp514x.txt | 3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip 5 video formats into digital video component. The tvp514x decoder supports analog- 6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D 7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into 11 - compatible : value should be either one among the following 17 - hsync-active: HSYNC Polarity configuration for endpoint. 19 - vsync-active: VSYNC Polarity configuration for endpoint. 21 - pclk-sample: Clock polarity of the endpoint. 24 media/video-interfaces.txt. 37 hsync-active = <1>; [all …]
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| D | ovti,ov772x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo@jmondi.org> 20 - ovti,ov7720 21 - ovti,ov7725 29 reset-gpios: 31 Reference to the GPIO connected to the RSTB pin which is active low. 34 powerdown-gpios: 36 Reference to the GPIO connected to the PWDN pin which is active high. [all …]
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| D | ovti,ov5642.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <festevam@gmail.com> 13 - $ref: /schemas/media/video-interface-devices.yaml# 25 AVDD-supply: 28 DVDD-supply: 31 DOVDD-supply: 34 powerdown-gpios: 38 reset-gpios: [all …]
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| D | galaxycore,gc0308.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 18 - $ref: /schemas/media/video-interface-devices.yaml# 23 - const: galaxycore,gc0308 24 - items: 25 - const: galaxycore,gc0309 26 - const: galaxycore,gc0308 35 reset-gpios: [all …]
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| D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marco Felsch <kernel@pengutronix.de> 12 description: |- 13 The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2 14 stream. The direction can be either parallel-in -> csi-out or csi-in -> 15 parallel-out The chip is programmable through I2C and SPI but the SPI 16 interface is only supported in parallel-in -> csi-out mode. 19 parallel-in -> csi-out path. [all …]
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| D | ti,ds90ub960.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO 17 - $ref: /schemas/i2c/i2c-atr.yaml# 22 - ti,ds90ub960-q1 23 - ti,ds90ub9702-q1 33 clock-names: [all …]
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| /Documentation/fb/ |
| D | viafb.modes | 10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) 21 # Active Time 25.422 us 15.253 ms 28 mode "640x480-60" 31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60" 35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock) 46 # Active Time 20.317 us 12.800 ms 52 mode "640x480-75" 56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock) 67 # Active Time 17.778 us 11.093 ms 73 mode "640x480-85" [all …]
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| /Documentation/devicetree/bindings/media/ |
| D | allwinner,sun4i-a10-csi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 13 description: |- 20 - const: allwinner,sun4i-a10-csi1 21 - const: allwinner,sun7i-a20-csi0 22 - items: [all …]
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| D | allwinner,sun6i-a31-csi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - allwinner,sun6i-a31-csi 17 - allwinner,sun8i-a83t-csi 18 - allwinner,sun8i-h3-csi 19 - allwinner,sun8i-v3s-csi [all …]
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| D | renesas,vin.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Video Input (VIN) 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 14 The R-Car Video Input (VIN) device provides video input capabilities for the 15 Renesas R-Car family of devices. 20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver. 25 - items: 26 - enum: [all …]
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| D | renesas,ceu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - linux-renesas-soc@vger.kernel.org 15 Mobile, R-Mobile and RZ SoCs. The interface supports a single parallel input 21 - renesas,r7s72100-ceu 22 - renesas,r8a7740-ceu 33 power-domains: 37 $ref: /schemas/graph.yaml#/$defs/port-base [all …]
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| D | marvell,mmp2-ccic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 15 pattern: '^camera@[a-f0-9]+$' 18 const: marvell,mmp2-ccic 26 power-domains: 30 $ref: /schemas/graph.yaml#/$defs/port-base 35 $ref: video-interfaces.yaml# [all …]
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| D | st,stm32-dcmipp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 11 - Alain Volmat <alain.volmat@foss.st.com> 15 const: st,stm32mp13-dcmipp 30 $ref: /schemas/graph.yaml#/$defs/port-base 37 $ref: video-interfaces.yaml# 41 bus-type: [all …]
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| D | atmel-isi.txt | 2 ---------------------------------- 5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi". 6 - reg: physical base address and length of the registers set for the device. 7 - interrupts: should contain IRQ line for the ISI. 8 - clocks: list of clock specifiers, corresponding to entries in the clock-names 9 property; please refer to clock-bindings.txt. 10 - clock-names: required elements: "isi_clk". 11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt. 15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt. 18 ------------------------ [all …]
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| D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sakari Ailus <sakari.ailus@linux.intel.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 29 #address-cells = <1>; 30 #size-cells = <0>; 45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is 49 specify #address-cells, #size-cells properties independently for the 'port' [all …]
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| D | st,stm32-dcmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 14 const: st,stm32-dcmi 25 clock-names: 27 - const: mclk 32 dma-names: 34 - const: tx [all …]
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| D | atmel,isc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 2 # Copyright (C) 2016-2021 Microchip Technology, Inc. 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Eugen Hristev <eugen.hristev@microchip.com> 22 const: atmel,sama5d2-isc 34 clock-names: 36 - const: hclock 37 - const: iscck 38 - const: gck [all …]
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| /Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 16 There're still four pins for camera control, two inputs (strobe and vsync), 18 supply, vsync input from IR camera, and fsin1/fsin2 output for the optional. 27 wakeup-source: true 32 enable-gpios: 36 richtek,ld-pulse-delay-us: [all …]
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| /Documentation/admin-guide/media/ |
| D | mgb4.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 --------------- 13 There are two types of parameters - global / PCI card related, found under 23 | 0 - No module present 24 | 1 - FPDL3 25 | 2 - GMSL 33 | 1 - FPDL3 34 | 2 - GMSL 42 PRODUCT-REVISION-SERIES-SERIAL 55 | 0 - single [all …]
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| /Documentation/devicetree/bindings/display/samsung/ |
| D | samsung,exynos7-decon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 22 const: samsung,exynos7-decon 27 clock-names: [all …]
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| D | samsung,fimd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,s3c2443-fimd 19 - samsung,s3c6400-fimd 20 - samsung,s5pv210-fimd [all …]
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-dpi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sam Ravnborg <sam@ravnborg.org> 13 - $ref: panel-common.yaml# 18 Shall contain a panel specific compatible and "panel-dpi" 21 - {} 22 - const: panel-dpi 25 enable-gpios: true [all …]
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| D | samsung,ld9040.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrzej Hajda <a.hajda@samsung.com> 13 - $ref: panel-common.yaml# 14 - $ref: /schemas/spi/spi-peripheral-props.yaml# 23 display-timings: true 25 reset-gpios: true 27 vdd3-supply: 30 vci-supply: [all …]
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