Searched full:window (Results 1 – 25 of 270) sorted by relevance
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| /Documentation/devicetree/bindings/watchdog/ |
| D | xlnx,versal-wwdt.yaml | 7 title: Xilinx Versal window watchdog timer controller
13 Versal watchdog intellectual property uses window watchdog mode.
14 Window watchdog timer(WWDT) contains closed(first) and open(second)
15 window with 32 bit width. Write to the watchdog timer within
16 predefined window periods of time. This means a period that is not
18 restarted within the open window time. If software tries to restart
19 WWDT outside of the open window time period, it generates a reset.
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| /Documentation/arch/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 59 Each window can be configured to be remapped via a "TCE table" (IOMMU
76 window and sixteen M64 windows. They have different characteristics.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
100 Now, this is the "main" window we use in Linux today (excluding
119 specify the PE# for the entire window. When segmented, a window
124 there's a defined ordering for which window applies.
129 We configure an M64 window to cover the entire region of address space
188 - M32 window: There's one M32 window, and it is split into 256
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| D | vas-api.rst | 19 To communicate with NX, kernel has to establish a channel or window and
30 kernel to setup channel / window which can be used to send compression
41 establish connection to the engine. It means send window is opened on GZIP
49 established connection or send window by closing the file descriptor
52 Note that applications can send several requests with the same window or
53 can establish multiple windows, but one window for each file descriptor.
81 node is opened, Kernel opens send window on a suitable instance of NX
100 privileges are needed to open the device. Each window corresponds to one
154 EEXIST Window is already opened for the given fd
155 ENOMEM Memory is not available to allocate window
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| /Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 20 the second cell for the address offset within the window.
30 within the internal register window (see below).
52 the first one controls the devices decoding window,
53 the second one controls the SDRAM decoding window and
80 ** MBus address decoding window specification
83 the window ID and the second one for the offset within the window.
84 In order to allow to describe valid and non-valid window entries, the
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
96 I = 4-bit window target ID
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| /Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-dc.yaml | 95 - description: window A memory client
96 - description: window B memory client
97 - description: window B memory client (vertical filter)
98 - description: window C memory client
141 - description: window A memory client
142 - description: window B memory client
143 - description: window C memory client
145 - description: window D memory client
146 - description: window T memory client
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| D | nvidia,tegra186-display.yaml | 45 - description: window group 0 reset
46 - description: window group 1 reset
47 - description: window group 2 reset
48 - description: window group 3 reset
49 - description: window group 4 reset
50 - description: window group 5 reset
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| /Documentation/driver-api/media/drivers/ |
| D | sh_mobile_ceu_camera.rst | 64 (6) to (6') - CEU scale - user window
77 current sensor scales onto input window - this is user S_CROP:
81 3. Calculate new combined scales from "effective" input window to requested user
82 window:
86 4. Calculate sensor output window by applying combined scales to real input
87 window:
91 5. Apply iterative sensor S_FMT for sensor output window.
95 6. Retrieve sensor output window (g_fmt)
107 9. Use CEU cropping to crop to the new window:
111 10. Use CEU scaling to scale to the requested user window:
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| /Documentation/driver-api/ |
| D | ntb.rst | 40 mainly used to perform the proper memory window initialization. Typically
41 there are two types of memory window interfaces supported by the NTB API:
55 So typical scenario of the first type memory window initialization looks:
58 maps corresponding outbound memory window so to have access to the shared
76 outbound memory window so to have access to the shared memory region.
82 1) Allocate memory for a shared window
83 2) Initialize memory window by translated address of the allocated region
84 (it may fail if local memory window initialization is unsupported)
85 3) Send the translated address and memory window index to a peer device
88 1) Initialize memory window with retrieved address of the allocated
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| D | vme.rst | 62 driver to request a specific window or DMA channel (which may be used by a
69 attributes can be requested for a single window, the core will assign a window
75 transfers as well as test pattern generation. If an unallocated window fitting
78 Functions are also provided to free window allocations once they are no longer
89 the underlying chipset. A window must be configured before it can be used.
92 Master window configuration
95 Once a master window has been assigned :c:func:`vme_master_set` can be used to
102 Master window access
109 do a read-modify-write transaction. Parts of a VME window can also be mapped
118 used is dependent on the underlying chipset. A window must be configured before
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| /Documentation/devicetree/bindings/mailbox/ |
| D | arm,mhuv2.yaml | 37 bits in a channel window. A channel window can support up to 32 doorbells
38 and the entire window shall be used in doorbell protocol. Optionally, data
94 window(s).
134 property represents the channel window group, which may be used in
137 doorbell number within the 32 bit wide channel window.
142 mboxes = <&mhu 0 5>; // Channel Window Group 0, doorbell 5.
143 mboxes = <&mhu 1 7>; // Channel Window Group 1, doorbell 7.
144 mboxes = <&mhu 2 0>; // Channel Window Group 2, data transfer protocol with 1 window.
145 mboxes = <&mhu 3 0>; // Channel Window Group 3, data transfer protocol with 5 windows.
146 mboxes = <&mhu 4 0>; // Channel Window Group 4, data transfer protocol with 7 windows.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-intel_th-devices-msc | 31 of numbers of pages for each window to be allocated. Number of
42 Description: (RW) Trigger window switch for the MSC's buffer, in
43 multi-window mode. In "multi" mode, accepts writes of "1", thereby
44 triggering a window switch for the buffer. Returns an error in any
51 Description: (RW) Configure whether trace stops when the last available window
53 window becomes available again (0/n/N).
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| D | sysfs-driver-intel-xe-hwmon | 8 if the power averaged over a window (typically seconds)
48 if the power averaged over a window (typically seconds)
71 operating frequency if the power averaged over a window exceeds
84 the operating frequency if the power averaged over a window
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| D | sysfs-driver-intel-i915-hwmon | 16 if the power averaged over a window (typically seconds)
48 operating frequency if the power averaged over a window exceeds
61 the operating frequency if the power averaged over a window
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| /Documentation/accounting/ |
| D | psi.rst | 74 time window, e.g. 100ms of total stall time within any 500ms window to
79 desired threshold and time window. The open file descriptor should be
83 <some|full> <stall amount in us> <time window in us>
87 1sec time window. Writing "full 50000 1000000" into /proc/pressure/io
88 would add 50ms threshold for full io stall measured within 1sec time window.
100 tracking window.
102 The kernel accepts window sizes ranging from 500ms to 10s, therefore min
109 window size must be a multiple of 2s, in order to prevent excessive resource
113 tracking window to avoid repeated activations/deactivations when system is
116 Notifications to the userspace are rate-limited to one per tracking window.
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| /Documentation/devicetree/bindings/tpm/ |
| D | ibm,vtpm.yaml | 39 dma-window properties
45 dma-window properties
48 ibm,my-dma-window:
50 DMA window associated with this virtual I/O Adapter
74 - ibm,my-dma-window
98 ibm,my-dma-window = <0x10000003 0x0 0x0 0x0 0x10000000>;
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| /Documentation/trace/ |
| D | hwlat_detector.rst | 51 must be less than the total window size (enforced)
52 - window - total period of sampling, width being inside (usecs)
54 By default the width is set to 500,000 and window to 1,000,000, meaning that
61 is less than 1 millisecond apart from window, to allow the system to not
77 - hwlat_detector/width - specified amount of time to spin within window (usecs)
78 - hwlat_detector/window - amount of time between (width) runs (usecs)
82 specified in cpumask at the beginning of a new window, in a round-robin
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| /Documentation/devicetree/bindings/powerpc/ |
| D | ibm,vas.txt | 11 window context start and length, OS/User window context start and length,
12 "Paste address" start and length, "Paste window id" start bit and number
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| /Documentation/PCI/endpoint/ |
| D | pci-vntb-function.rst | 50 5) Memory Window (MW)
94 Memory Window:
98 memory window.
110 BAR2 Memory Window 1
111 BAR3 Memory Window 2
112 BAR4 Memory Window 3
113 BAR5 Memory Window 4
125 BAR4 Memory Window 1
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| D | pci-ntb-function.rst | 55 5) Memory Window (MW)
89 | NO OF MEMORY WINDOW |
122 CMD_CONFIGURE_MW (0x2): Command to configure memory window (MW). The
126 the SIZE register and the memory window index should be programmed
149 Address and Size to be used while configuring the memory window.
154 Memory Window 1 and Doorbell registers are packed together in the
156 registers and the latter portion of the region is for memory window 1.
157 This register will specify the offset of the memory window 1.
159 NO OF MEMORY WINDOW:
218 Memory Window:
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| /Documentation/maintainer/ |
| D | maintainer-entry-profile.rst | 54 sent at any time before the merge window closes and can still be
56 be settled in soaking in linux-next in advance of the merge window
62 New feature submissions targeting the next merge window should have
65 the NEXT+1 merge window, or should come with sufficient justification
72 set will need to wait for the NEXT+1 merge window. Of course there is no
75 resubmit for the following merge window.
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| /Documentation/userspace-api/media/v4l/ |
| D | dev-overlay.rst | 17 video into a window.
119 Overlay Window
122 The overlaid image is determined by cropping and overlay window
128 The overlay window is described by a struct
138 To program the overlay window applications set the ``type`` field of a
153 prohibits different image and window sizes, the size requested first
165 Size and position of the window relative to the top, left corner of
167 :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>`. The window can extend the
170 driver clips the window accordingly, or if that is not possible,
197 Like the window coordinates w, clipping rectangles are defined
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| /Documentation/devicetree/bindings/iommu/ |
| D | nvidia,tegra30-smmu.txt | 9 - dma-window : IOVA start address and length.
19 dma-window = <0 0x40000000>; /* IOVA start & length */
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| D | iommu.txt | 56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
59 the DMA window for the given device. The length of the DMA window is given
186 Multiple-master IOMMU with configurable DMA window:
193 * address of the DMA window. The length of the DMA
194 * window is encoded in two cells.
196 * The DMA window is the range addressable by the
203 /* master ID 42, 4 GiB DMA window starting at 0 */
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| /Documentation/devicetree/bindings/pci/ |
| D | mobiveil-pcie.txt | 23 1. Config window
24 2. Memory window
26 default 1 inbound memory window is configured.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | msi-pic.txt | 94 In the PAMU, each PCI controller is given only one primary window. The
95 PAMU restricts DMA operations so that they can only occur within a window.
96 Because PCI devices must be able to DMA to memory, the primary window must
107 primary window used for memory, but mapped to the MSIR block (where MSIIR
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