Searched full:wire (Results 1 – 25 of 157) sorted by relevance
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| /Documentation/w1/masters/ |
| D | w1-uart.rst | 13 UART 1-Wire bus driver. The driver utilizes the UART interface via the
14 Serial Device Bus to create the 1-Wire timing patterns as described in
15 the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
17 …ing a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a…
22 1-Wire read bit, write bit or reset pulse.
24 For instance the timing pattern for a 1-Wire reset and presence detect uses
27 for 1-Wire to 521 us. A present 1-Wire device changes the received byte by
29 the 1-Wire operation.
31 Similar for a 1-Wire read bit or write bit, which uses the baud-rate
37 a 1-Wire read or write operation 115200. In case the actual baud-rate
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| D | omap-hdq.rst | 2 Kernel driver for omap HDQ/1-wire module
7 HDQ/1-wire controller on the TI OMAP 2430/3430 platforms.
15 The HDQ/1-Wire module of TI OMAP2430/3430 platforms implement the hardware
17 Semiconductor 1-Wire protocols. These protocols use a single wire for
18 communication between the master (HDQ/1-Wire controller) and the slave
19 (HDQ/1-Wire external compliant device).
21 A typical application of the HDQ/1-Wire module is the communication with battery
24 The controller supports operation in both HDQ and 1-wire mode. The essential
25 difference between the HDQ and 1-wire mode is how the slave device responds to
29 does not respond with a presence pulse as it does in the 1-Wire protocol.
[all …]
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| D | w1-gpio.rst | 11 GPIO 1-wire bus master driver. The driver uses the GPIO API to control the
12 wire and the GPIO pin can be specified using GPIO machine descriptor tables.
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| /Documentation/devicetree/bindings/w1/ |
| D | w1-uart.yaml | 7 title: UART 1-Wire Bus
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
22 a 1-Wire read or write operation 115200. In case the actual baud-rate
24 to generate the 1-Wire timing patterns.
26 https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html
35 The baud rate for the 1-Wire reset and presence detect.
40 The baud rate for the 1-Wire write-0 cycle.
45 The baud rate for the 1-Wire write-1 and read cycle.
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| D | amd,axi-1wire-host.yaml | 4 $id: http://devicetree.org/schemas/w1/amd,axi-1wire-host.yaml#
7 title: AMD AXI 1-wire bus host for programmable logic
14 const: amd,axi-1wire-host
38 compatible = "amd,axi-1wire-host";
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| D | omap-hdq.txt | 1 * OMAP HDQ One wire bus master controller
10 - ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
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| D | maxim,ds2482.yaml | 7 title: Maxim One wire bus master controller
13 I2C to 1-wire bridges
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| /Documentation/devicetree/bindings/iio/temperature/ |
| D | maxim,max31865.yaml | 22 maxim,3-wire:
25 enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.
51 maxim,3-wire;
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| /Documentation/peci/ |
| D | peci.rst | 24 PECI Wire
27 PECI Wire interface uses a single wire for self-clocking and data
29 physical layer is a self-clocked one-wire bus signal that begins each
32 value is logic '0' or logic '1'. PECI Wire also includes variable data
35 For PECI Wire, each processor package will utilize unique, fixed
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | intel,ce4100-lapic.yaml | 42 intel,virtual-wire-mode:
47 Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode.
52 mode is configured to virtual wire compatibility mode.
70 intel,virtual-wire-mode;
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| /Documentation/devicetree/bindings/display/panel/ |
| D | tpo,tpg110.yaml | 17 and other properties, and has a control interface over 3WIRE
39 protocol is not I2C but 3WIRE SPI.
62 spi-3wire: true
73 - spi-3wire
88 spi-3wire;
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| D | leadtek,ltk035c5444t.yaml | 24 spi-3wire: true
46 spi-3wire;
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| D | kingdisplay,kd035g6-54nt.yaml | 28 spi-3wire: true
50 spi-3wire;
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| D | fascontek,fs035vg158.yaml | 23 spi-3wire: true
45 spi-3wire;
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| D | anbernic,rg35xx-plus-panel.yaml | 30 spi-3wire: true
53 spi-3wire;
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| /Documentation/iio/ |
| D | ad4000.rst | 35 CS mode, 3-wire turbo mode
38 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
41 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
42 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
43 same of standard spi-3wire mode.
65 CS mode, 3-wire, without busy indicator
68 Another wiring configuration supported as "3-wire" mode has the SDI pin
71 is not possible. This connection mode saves one wire and works with any SPI
107 CS mode, 4-wire without busy indicator
110 In datasheet "4-wire" mode, the controller CS line is connected to the ADC SDI
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| /Documentation/devicetree/bindings/sound/ |
| D | awinic,aw8738.yaml | 14 (set using one-wire pulse control). The mode configures the speaker-guard
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
32 description: Operation mode (number of pulses for one-wire pulse control)
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| /Documentation/devicetree/bindings/spi/ |
| D | icpdas-lp8841-spi-rtc.txt | 28 - spi-3wire: The master itself has only 3 wire. It cannor work in
50 spi-3wire;
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,am3359-tsc.yaml | 17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
36 ti,wire-config:
63 - ti,wire-config
74 ti,wire-config = <0x00 0x11 0x22 0x33>;
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| /Documentation/devicetree/bindings/display/ |
| D | multi-inno,mi0283qt.txt | 12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
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| /Documentation/sound/soc/ |
| D | dai.rst | 12 AC97 is a five wire interface commonly found on many PC sound cards. It is
26 I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
50 PCM is another 4 wire interface, very similar to I2S, which can support a more
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | kinetic,ktd253.yaml | 7 title: Kinetic Technologies KTD253 and KTD259 one-wire backlight
16 using pulses on the enable wire. This is sometimes referred to as
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| /Documentation/devicetree/bindings/rtc/ |
| D | maxim-ds1302.txt | 22 - spi-3wire : The device has a shared signal IN/OUT line.
42 spi-3wire;
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7944.yaml | 46 the datasheet calls "4-wire mode". This is the conventional SPI mode used
54 * single: The datasheet calls this "3-wire mode". (NOTE: The datasheet's
55 definition of 3-wire mode is NOT at all related to the standard
56 spi-3wire property!) This mode is often used when the ADC is the only
154 # in '4-wire' mode, cnv-gpios is required, for other modes it is optional
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| /Documentation/driver-api/gpio/ |
| D | intro.rst | 38 value might be driven, supporting "wire-OR" and similar schemes for the
42 of pins configured as "output", which is very useful in such "wire-OR"
86 This is sometimes called a "wire-AND"; or more practically, from the negative
87 logic (low=true) perspective this is a "wire-OR".
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