Searched full:wired (Results 1 – 25 of 119) sorted by relevance
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | img,pdc-intc.txt | 82 * An SoC peripheral that is wired through the PDC.
85 // The interrupt controller that this device is wired to.
96 * An interrupt generating device that is wired to a SysWake pin.
99 // The interrupt controller that this device is wired to.
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| D | marvell,sei.txt | 10 AP and is wired while a second set comes from the CPs by the mean of
19 - #interrupt-cells: number of cells to define an SEI wired interrupt
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| D | riscv,aplic.yaml | 14 platform level interrupt controller (APLIC) for handling wired interrupts
51 Given APLIC domain forwards wired interrupts as MSIs to a AIA incoming
62 Specifies the number of wired interrupt sources supported by this
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| D | open-pic.txt | 81 * An interrupt generating device that is wired to an Open PIC.
89 // The interrupt controller that this device is wired to.
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| D | openrisc,ompic.txt | 12 - interrupts : Specifies the interrupt line to which the ompic is wired.
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| D | marvell,gicp.txt | 6 located in the Marvell CP110 to turn wired interrupts inside the CP
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| D | mti,cpu-interrupt-controller.yaml | 13 With the irq_domain in place we can describe how the 8 IRQs are wired to the
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| D | marvell,mpic.yaml | 16 On Marvell Armada 375, 38x and 39x this controller is wired under ARM GIC.
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| /Documentation/devicetree/bindings/media/ |
| D | st-rc.txt | 12 be present iff the rx pins are wired up.
15 be present iff the tx pins are wired up.
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| /Documentation/devicetree/bindings/iio/resolver/ |
| D | adi,ad2s1210.yaml | 44 Note on SPI connections: The CS line on the AD2S1210 should hard-wired to
105 RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits
120 This is used to indicate the selected mode if A0 and A1 are hard-wired
130 RES1 are hard-wired to match this value.
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-peripheral-props.yaml | 92 description: Several SPI memories can be wired in stacked mode.
104 description: Several SPI memories can be wired in parallel mode.
110 many busses as devices must be wired. The size of each chip should
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4000.yaml | 77 Describes how the ADC SDI pin is wired. A value of "sdi" indicates that
79 pin is hard-wired to logic high (VIO). "low" indicates that it is
80 hard-wired low (GND). "cs" indicates that the ADC SDI pin is connected to
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| D | adi,ad7944.yaml | 111 line is hard-wired and the state is determined by the adi,always-turbo
118 When present, this property indicates that the TURBO line is hard-wired
120 present, the TURBO line is assumed to be hard-wired and the state is
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | sil,sii9022.yaml | 41 <0> if only I2S or S/PDIF pin is wired,
42 <1> if both are wired.
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| /Documentation/devicetree/bindings/sound/ |
| D | adi,adau17x1.yaml | 26 as wired in hardware.
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| D | adi,adau1701.txt | 7 and ADDR1, as wired in hardware.
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| /Documentation/hwmon/ |
| D | w83773g.rst | 27 The chip is wired over I2C/SMBus and specified over a temperature
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| D | via686a.rst | 80 in which case the sensor inputs will not be wired. This is the case of
84 not wired for hardware monitoring.
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| D | smsc47m192.rst | 57 the motherboard has this input wired to VID4.
87 would typically be wired to the diode inside the CPU)
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| /Documentation/devicetree/bindings/usb/ |
| D | usb-hcd.yaml | 34 description: The hard wired USB devices
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| /Documentation/devicetree/bindings/soc/fsl/ |
| D | guts.txt | 23 is wired to reset upon setting the HRESET_REQ bit in this register).
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-adc-envelope-detector | 8 of a comparator wired to an interrupt pin. Like so::
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| /Documentation/devicetree/bindings/leds/ |
| D | qcom,pm8058-led.yaml | 17 hard-wired usecase.
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| /Documentation/devicetree/bindings/mfd/ |
| D | twl4030-power.txt | 23 depending on how the external oscillator is wired.
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| /Documentation/devicetree/bindings/net/ |
| D | asix,ax88178.yaml | 13 Device tree properties for hard wired USB Ethernet devices.
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