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/Documentation/wmi/devices/
Dmsi-wmi-platform.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 MSI WMI Platform Features driver (msi-wmi-platform)
22 [WMI, Locale("MS\0x409"),
24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")]
26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
29 [WMI, Locale("MS\0x409"),
31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")]
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
36 [WMI, Dynamic, Provider("WmiProv"), Locale("MS\0x409"),
38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")]
[all …]
/Documentation/ABI/testing/
Dsysfs-driver-xdata1 What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write
6 will create write TLPs frames - from the Root Complex to the
10 Write y/1/on to enable, n/0/off to disable
13 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write
15 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write
21 cat /sys/class/misc/dw-xdata-pcie.<device>/write
24 The file is read and write.
26 What: /sys/class/misc/dw-xdata-pcie.<device>/read
31 will create read TLPs frames - from the Endpoint to the Root
35 Write y/1/on to enable, n/0/off to disable
[all …]
Dsysfs-platform-dfl-port1 What: /sys/bus/platform/devices/dfl-port.0/id
5 Description: Read-only. It returns id of this port. One DFL FPGA device
9 What: /sys/bus/platform/devices/dfl-port.0/afu_id
13 Description: Read-only. User can program different PR bitstreams to FPGA
18 What: /sys/bus/platform/devices/dfl-port.0/power_state
22 Description: Read-only. It reports the APx (AFU Power) state, different APx
24 returns "0" - Normal / "1" - AP1 / "2" - AP2 / "6" - AP6.
26 What: /sys/bus/platform/devices/dfl-port.0/ap1_event
30 Description: Read-write. Read this file for AP1 (AFU Power State 1) event.
31 It's used to indicate transient AP1 state. Write 1 to this
[all …]
Dsysfs-block-zram5 The disksize file is read-write and specifies the disk size
14 The initstate file is read-only and shows the initialization
21 The reset file is write-only and allows resetting the
29 The max_comp_streams file is read-write and specifies the
37 The comp_algorithm file is read-write and lets to show
45 The mem_used_max file is write-only and is used to reset
47 compressed data. For resetting the value, you should write
48 "0". Otherwise, you could see -EINVAL.
55 The mem_limit file is write-only and specifies the maximum
57 The limit could be changed in run time and "0" means disable
[all …]
Dsysfs-platform-dfl-fme1 What: /sys/bus/platform/devices/dfl-fme.0/ports_num
5 Description: Read-only. One DFL FPGA device may have more than 1
9 What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id
13 Description: Read-only. It returns Bitstream (static FPGA region)
17 What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata
21 Description: Read-only. It returns Bitstream (static FPGA region) meta
25 What: /sys/bus/platform/devices/dfl-fme.0/cache_size
29 Description: Read-only. It returns cache size of this FPGA device.
31 What: /sys/bus/platform/devices/dfl-fme.0/fabric_version
35 Description: Read-only. It returns fabric version of this FPGA device.
[all …]
Dsysfs-class-pktcdvd2 ---------------
15 add (WO) Write a block device id (major:minor) to
19 remove (WO) Write the pktcdvd device id (major:minor)
23 pktcdvd[0-7] <pktdevid> <blkdevid>
27 What: /sys/class/pktcdvd/pktcdvd[0-7]/dev
28 What: /sys/class/pktcdvd/pktcdvd[0-7]/uevent
38 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/packets_started
39 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/packets_finished
40 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/kb_written
41 What: /sys/class/pktcdvd/pktcdvd[0-7]/stat/kb_read
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Dconfigfs-spear-pcie-gadget1 What: /config/pcie-gadget
15 # mount -t configfs none /config/
17 For nth PCIe Device Controller /config/pcie-gadget.n/:
24 inta write 1 to assert INTA and 0 to de-assert.
25 send_msi write MSI vector to be sent.
26 vendor_id used to write and read vendor id (hex)
27 device_id used to write and read device id (hex)
28 bar0_size used to write and read bar0_size
29 bar0_address used to write and read bar0 mapped area in hex.
30 bar0_rw_offset used to write and read offset of bar0 where bar0_data
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/Documentation/filesystems/
Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
22 example of this approach is the implementation of LSM (log-structured merge)
31 -------------------
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
[all …]
/Documentation/ABI/stable/
Dsysfs-bus-nvmem6 This read/write attribute allows users to set read-write
7 devices as read-only and back to read-write from userspace.
8 This can be used to unlock and relock write-protection of
11 Read returns '0' or '1' for read-write or read-only modes
13 Write parses one of 'YyTt1NnFf0', or [oO][NnFf] for "on"
23 This file allows user to read/write the raw NVMEM contents.
24 Permissions for write to this file depends on the nvmem
35 00000a0 db10 2240 0000 e000 0c00 0c00 0000 0c00
46 This read-only attribute allows user to read the NVMEM
/Documentation/scsi/
Dsd-parameters.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ---------------
9 Enable/disable drive write & read cache.
12 cache_type string WCE RCD Write cache Read cache
14 write through 0 0 off on
15 none 0 1 off off
16 write back 1 0 on on
17 write back, no read (daft) 1 1 on off
20 To set cache type to "write back" and save this setting to the drive::
22 # echo "write back" > cache_type
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/Documentation/devicetree/bindings/memory-controllers/
Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
17 0: Asynchronous mode 1 SRAM/FRAM.
25 8: Synchronous read synchronous write PSRAM.
26 9: Synchronous read asynchronous write PSRAM.
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Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
[all …]
Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]
/Documentation/arch/x86/
Dmtrr.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999
8 - Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015
17 non-PAT systems while a no-op but equally effective on PAT enabled systems.
37 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
38 allows bus write transfers to be combined into a larger transfer
40 of image write operations 2.5 times or more.
46 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
50 The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
62 which allows you to read and write. The other is an ioctl()
[all …]
/Documentation/bpf/
Dprog_cgroup_sysctl.rst1 .. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
8 provides cgroup-bpf hook for sysctl.
11 process inside that cgroup tries to read from or write to sysctl knob in proc.
26 __u32 write;
30 * ``write`` indicates whether sysctl value is being read (``0``) or written
31 (``1``). This field is read-only.
34 or written. This field is read-write. Writing to the field sets the starting
35 position in sysctl proc file ``read(2)`` will be reading from or ``write(2)``
37 whole sysctl value by ``bpf_sysctl_set_new_value()`` on ``write(2)`` even
38 when it's called by user space on ``file_pos > 0``. Writing non-zero
[all …]
/Documentation/networking/device_drivers/atm/
Dcxacru-cf.py15 # this program; if not, write to the Free Software Foundation, Inc., 59
16 # Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 # Usage: cxacru-cf.py < cxacru-cf.bin
21 # Warning: cxacru-cf.bin with MD5 hash cdbac2689969d5ed5d4850f117702110
22 # contains mis-aligned values which will stop the modem from being able
32 i = 0
36 if len(buf) == 0:
39 sys.stdout.write("\n")
40 sys.stderr.write("Error: read {0} not 4 bytes\n".format(len(buf)))
43 if i > 0:
[all …]
/Documentation/devicetree/bindings/bus/
Dqcom,ebi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 external memory (such as NAND or other memory-mapped peripherals) whereas
17 NOR flash memories), WE (write enable). This on top of 6 different chip selects
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
[all …]
/Documentation/userspace-api/media/v4l/
Dfunc-write.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-write:
7 V4L2 write()
13 v4l2-write - Write to a V4L2 device
18 .. code-block:: c
22 .. c:function:: ssize_t write( int fd, void *buf, size_t count )
39 :c:func:`write()` writes up to ``count`` bytes to the device
42 enables them. When ``count`` is zero, :c:func:`write()` returns 0
54 nothing was written. On error, -1 is returned, and the ``errno``
55 variable is set appropriately. In this case the next write will start at
[all …]
/Documentation/hwmon/
Doxp-sensors.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Kernel driver oxp-sensors
7 - Derek John Clark <derekjohn.clark@gmail.com>
8 - Joaquín Ignacio Aramendía <samsagax@gmail.com>
11 ------------
27 -----------------
31 - AOKZOE A1
32 - AOKZOE A1 PRO
33 - AYANEO 2
34 - AYANEO 2S
[all …]
/Documentation/devicetree/bindings/w1/
Dw1-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
[all …]
/Documentation/devicetree/bindings/mtd/
Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]
/Documentation/admin-guide/device-mapper/
Dlog-writes.rst2 dm-log-writes
6 of the write operations to. This is intended for file system developers wishing
8 There is a log_write_entry written for every WRITE request and the target is
10 that is in the WRITE requests is copied into the log to make the replay happen
16 We log things in order of completion once we are sure the write is no longer in
17 cache. This means that normal WRITE requests are not actually logged until the
22 This works by attaching all WRITE requests to a list once the write completes.
27 following example (W means write, C means complete):
42 Any REQ_OP_DISCARD requests are treated like WRITE requests. Otherwise we would
43 have all the DISCARD requests, and then the WRITE requests and then the FLUSH
[all …]
/Documentation/mm/
Dmmu_notifier.rst14 B) a page table entry is updated to point to a new page (COW, write fault
17 Case A is obvious you do not want to take the risk for the device to write to
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
34 they are write protected for COW (other case of B apply too).
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
[all …]
/Documentation/filesystems/spufs/
Dspufs.rst1 .. SPDX-License-Identifier: GPL-2.0
10 spufs - the SPU file system
21 message queues. Users that have write permissions on the file system
26 logical SPU. Users can change permissions on those files, but not actu-
34 set the user owning the mount point, the default is 0 (root).
37 set the group owning the mount point, the default is 0 (root).
43 The files in spufs mostly follow the standard behavior for regular sys-
44 tem calls like read(2) or write(2), but often support only a subset of
50 all files that support the write(2) operation also support writev(2).
55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
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/Documentation/misc-devices/
Dspear-pcie-gadget.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -----------------------
52 write behavior of nodes:
53 ------------------------
56 link write UP to enable ltsmm DOWN to disable
57 int_type write interrupt type to be configured and (int_type could be
61 inta write 1 to assert INTA and 0 to de-assert.
62 send_msi write MSI vector to be sent.
63 vendor_id write vendor id(hex) to be programmed.
64 device_id write device id(hex) to be programmed.
[all …]

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