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/Documentation/ABI/testing/
Dsysfs-driver-xdata1 What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write
6 will create write TLPs frames - from the Root Complex to the
10 Write y/1/on to enable, n/0/off to disable
13 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write
15 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write
21 cat /sys/class/misc/dw-xdata-pcie.<device>/write
24 The file is read and write.
26 What: /sys/class/misc/dw-xdata-pcie.<device>/read
31 will create read TLPs frames - from the Endpoint to the Root
35 Write y/1/on to enable, n/0/off to disable
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Dsysfs-class-bdi14 non-block filesystems which provide their own BDI, such as NFS
17 MAJOR:MINOR-fuseblk
23 The default backing dev, used for non-block device backed
30 Size of the read-ahead window in kilobytes
32 (read-write)
38 total write-back cache that relates to its current average
42 percentage of the write-back cache to a particular device.
45 (read-write)
52 total write-back cache that relates to its current average
56 of the write-back cache to a particular device. The value is
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Dsysfs-bus-iio-frequency-admv10131 What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_i_calibphase
3 Contact: linux-iio@vger.kernel.org
5 Read/write unscaled value for the Local Oscillatior path quadrature I phase shift.
7 What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_q_calibphase
9 Contact: linux-iio@vger.kernel.org
11 Read/write unscaled value for the Local Oscillatior path quadrature Q phase shift.
15 Contact: linux-iio@vger.kernel.org
17 Read/write value for the Local Oscillatior Feedthrough Offset Calibration I Positive
22 Contact: linux-iio@vger.kernel.org
24 Read/write value for the Local Oscillatior Feedthrough Offset Calibration Q Positive side.
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Dsysfs-platform-dfl-port1 What: /sys/bus/platform/devices/dfl-port.0/id
5 Description: Read-only. It returns id of this port. One DFL FPGA device
9 What: /sys/bus/platform/devices/dfl-port.0/afu_id
13 Description: Read-only. User can program different PR bitstreams to FPGA
18 What: /sys/bus/platform/devices/dfl-port.0/power_state
22 Description: Read-only. It reports the APx (AFU Power) state, different APx
24 returns "0" - Normal / "1" - AP1 / "2" - AP2 / "6" - AP6.
26 What: /sys/bus/platform/devices/dfl-port.0/ap1_event
30 Description: Read-write. Read this file for AP1 (AFU Power State 1) event.
31 It's used to indicate transient AP1 state. Write 1 to this
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Dconfigfs-spear-pcie-gadget1 What: /config/pcie-gadget
15 # mount -t configfs none /config/
17 For nth PCIe Device Controller /config/pcie-gadget.n/:
24 inta write 1 to assert INTA and 0 to de-assert.
25 send_msi write MSI vector to be sent.
26 vendor_id used to write and read vendor id (hex)
27 device_id used to write and read device id (hex)
28 bar0_size used to write and read bar0_size
29 bar0_address used to write and read bar0 mapped area in hex.
30 bar0_rw_offset used to write and read offset of bar0 where bar0_data
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Dconfigfs-most9 # mount -t configfs none /sys/kernel/config/
22 configure the sub-buffer size for this channel
58 write '1' to this attribute to trigger the
60 configuration, the creation is post-poned until
64 write '1' to this attribute to destroy an
77 configure the sub-buffer size for this channel
113 write '1' to this attribute to trigger the
115 configuration, the creation is post-poned until
119 write '1' to this attribute to destroy an
132 configure the sub-buffer size for this channel
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Dsysfs-class-firmware5 Description: The data sysfs file is used for firmware-fallback and for
7 after you echo 1 to the loading sysfs file. When the firmware
8 image write is complete, echo 0 to the loading sysfs file. This
9 sequence will signal the completion of the firmware write and
10 signal the lower-level driver that the firmware data is
17 Description: Write-only. For firmware uploads, write a "1" to this file to
18 request that the transfer of firmware data to the lower-level
20 the update cannot be canceled (e.g. a FLASH write is in
27 Description: Read-only. Returns a string describing a failed firmware
31 following: "hw-error", "timeout", "user-abort", "device-busy",
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/Documentation/scsi/
Dsd-parameters.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ---------------
9 Enable/disable drive write & read cache.
12 cache_type string WCE RCD Write cache Read cache
14 write through 0 0 off on
15 none 0 1 off off
16 write back 1 0 on on
17 write back, no read (daft) 1 1 on off
20 To set cache type to "write back" and save this setting to the drive::
22 # echo "write back" > cache_type
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/Documentation/devicetree/bindings/w1/
Dw1-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
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/Documentation/devicetree/bindings/memory-controllers/
Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
17 0: Asynchronous mode 1 SRAM/FRAM.
18 1: Asynchronous mode 1 PSRAM.
25 8: Synchronous read synchronous write PSRAM.
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Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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/Documentation/driver-api/md/
Draid5-cache.rst7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean
27 and parity don't match. The reason is that a stripe write involves several RAID
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Draid5-ppl.rst10 array or using it is as degraded - data calculated from parity for array blocks
11 that have not been touched by a write request during the unclean shutdown can
12 be incorrect. Such condition is known as the RAID5 Write Hole. Because of
15 Partial parity for a write operation is the XOR of stripe data chunks not
16 modified by this write. It is just enough data needed for recovering from the
17 write hole. XORing partial parity with the modified chunks produces parity for
18 the stripe, consistent with its state before the write operation, regardless of
23 the array. Because of this, using write-intent bitmap and PPL together is not
26 When handling a write request PPL writes partial parity before new data and
27 parity are dispatched to disks. PPL is a distributed log - it is stored on
[all …]
/Documentation/filesystems/
Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
22 example of this approach is the implementation of LSM (log-structured merge)
31 -------------------
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
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/Documentation/bpf/
Dprog_cgroup_sysctl.rst1 .. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
8 provides cgroup-bpf hook for sysctl.
11 process inside that cgroup tries to read from or write to sysctl knob in proc.
13 1. Attach type
26 __u32 write;
30 * ``write`` indicates whether sysctl value is being read (``0``) or written
31 (``1``). This field is read-only.
34 or written. This field is read-write. Writing to the field sets the starting
35 position in sysctl proc file ``read(2)`` will be reading from or ``write(2)``
37 whole sysctl value by ``bpf_sysctl_set_new_value()`` on ``write(2)`` even
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/Documentation/arch/x86/
Dmtrr.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999
8 - Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015
17 non-PAT systems while a no-op but equally effective on PAT enabled systems.
37 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
38 allows bus write transfers to be combined into a larger transfer
40 of image write operations 2.5 times or more.
46 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
50 The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
62 which allows you to read and write. The other is an ioctl()
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/Documentation/userspace-api/media/v4l/
Dfunc-write.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-write:
7 V4L2 write()
13 v4l2-write - Write to a V4L2 device
18 .. code-block:: c
22 .. c:function:: ssize_t write( int fd, void *buf, size_t count )
39 :c:func:`write()` writes up to ``count`` bytes to the device
42 enables them. When ``count`` is zero, :c:func:`write()` returns 0
54 nothing was written. On error, -1 is returned, and the ``errno``
55 variable is set appropriately. In this case the next write will start at
[all …]
/Documentation/wmi/devices/
Dmsi-wmi-platform.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 MSI WMI Platform Features driver (msi-wmi-platform)
24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")]
26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")]
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")]
43 [WmiMethodId(1), Implemented, read, write, Description("Return the contents of a package")]
46 [WmiMethodId(2), Implemented, read, write, Description("Set the contents of a package")]
49 [WmiMethodId(3), Implemented, read, write, Description("Return the contents of a package")]
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/Documentation/hwmon/
Doxp-sensors.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Kernel driver oxp-sensors
7 - Derek John Clark <derekjohn.clark@gmail.com>
8 - Joaquín Ignacio Aramendía <samsagax@gmail.com>
11 ------------
27 -----------------
31 - AOKZOE A1
32 - AOKZOE A1 PRO
33 - AYANEO 2
34 - AYANEO 2S
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/Documentation/filesystems/spufs/
Dspufs.rst1 .. SPDX-License-Identifier: GPL-2.0
10 spufs - the SPU file system
21 message queues. Users that have write permissions on the file system
26 logical SPU. Users can change permissions on those files, but not actu-
43 The files in spufs mostly follow the standard behavior for regular sys-
44 tem calls like read(2) or write(2), but often support only a subset of
50 all files that support the write(2) operation also support writev(2).
55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
68 read(2), pread(2), write(2), pwrite(2), lseek(2)
70 write(2) and pwrite(2) are not supported beyond the end of the
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/Documentation/ABI/stable/
Dsysfs-bus-nvmem6 This read/write attribute allows users to set read-write
7 devices as read-only and back to read-write from userspace.
8 This can be used to unlock and relock write-protection of
11 Read returns '0' or '1' for read-write or read-only modes
13 Write parses one of 'YyTt1NnFf0', or [oO][NnFf] for "on"
23 This file allows user to read/write the raw NVMEM contents.
24 Permissions for write to this file depends on the nvmem
46 This read-only attribute allows user to read the NVMEM
/Documentation/networking/device_drivers/atm/
Dcxacru-cf.py15 # this program; if not, write to the Free Software Foundation, Inc., 59
16 # Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 # Usage: cxacru-cf.py < cxacru-cf.bin
21 # Warning: cxacru-cf.bin with MD5 hash cdbac2689969d5ed5d4850f117702110
22 # contains mis-aligned values which will stop the modem from being able
39 sys.stdout.write("\n")
40 sys.stderr.write("Error: read {0} not 4 bytes\n".format(len(buf)))
41 sys.exit(1)
44 sys.stdout.write(" ")
45 sys.stdout.write("{0:x}={1}".format(i, struct.unpack("<I", buf)[0]))
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/Documentation/devicetree/bindings/bus/
Dqcom,ebi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 external memory (such as NAND or other memory-mapped peripherals) whereas
15 lines (up to 9 address lines so can only address 1KiB external memory space),
17 NOR flash memories), WE (write enable). This on top of 6 different chip selects
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
[all …]
/Documentation/devicetree/bindings/mtd/
Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]

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