Searched +full:x +full:- +full:offset (Results 1 – 25 of 150) sorted by relevance
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | edt-ft5x06.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/input/touchscreen/edt-ft5x06.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: FocalTech EDT-FT5x06 Polytouch 18 - Dmitry Torokhov <dmitry.torokhov@gmail.com> 21 - $ref: touchscreen.yaml# 22 - if: 27 - evervision,ev-ft5726 31 offset-x: true [all …]
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| D | hycon,hy46xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 Glass: 0.3mm--4.0mm 12 PET/PMMA: 0.2mm--2.0mm 13 HY4613(B)-N048 < 6" 14 HY4614(B)-N068 7" .. 10.1" 15 HY4621-NS32 < 5" 16 HY4623-NS48 5.1" .. 7" 17 Glass: 0.3mm--8.0mm [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | xgene.txt | 1 Device Tree Clock bindings for APM X-Gene 5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 8 - compatible : shall be one of the following: 9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock 10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock 11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock 12 "apm,xgene-device-clock" - for a X-Gene device clock 13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock 14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock 17 - reg : shall be the physical PLL register address for the pll clock. [all …]
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| /Documentation/core-api/ |
| D | this_cpu_ops.rst | 14 this_cpu operations add a per cpu variable offset to the processor 19 the offset and the operation on the data. Therefore it is not 24 Read-modify-write operations are of particular interest. Frequently 65 ------------------------------------ 75 DEFINE_PER_CPU(int, x); 78 z = this_cpu_read(x); 82 mov ax, gs:[x] 92 this_cpu_inc(x) 96 inc gs:[x] 105 y = per_cpu_ptr(&x, cpu); [all …]
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| /Documentation/devicetree/bindings/input/ |
| D | syna,rmi4.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jason A. Donenfeld <Jason@zx2c4.com> 11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com 12 - Vincent Huang <vincent.huang@tw.synaptics.com> 22 - syna,rmi4-i2c 23 - syna,rmi4-spi 28 '#address-cells': 31 '#size-cells': [all …]
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-mipi-dbi-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Noralf Trønnes <noralf@tronnes.org> 23 - Power: 24 - Vdd: Power supply for display module 25 Called power-supply in this binding. 26 - Vddi: Logic level supply for interface signals 27 Called io-supply in this binding. [all …]
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| /Documentation/filesystems/ |
| D | cramfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Cramfs - cram a filesystem onto a small ROM 10 allows random page access. The meta-data is not compressed, but is 15 compact also makes it _very_ hard to update on-the-fly), so you have to 20 ----------- 36 no need to use -noleaf in ``find``, btw.) 39 (1970 GMT). Recently-accessed files may have updated timestamps, but 52 -------------------------- 62 eXecute-In-Place (XIP) from ROM of read-only segments. Data segments mapped 63 read-write (hence they have to be copied to RAM) may still be compressed in [all …]
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| /Documentation/bpf/standardization/ |
| D | instruction-set.rst | 27 BCP 14 `<https://www.rfc-editor.org/info/rfc2119>`_ 28 `<https://www.rfc-editor.org/info/rfc8174>`_ 38 ----- 51 .. table:: Meaning of bit-width notation 63 For example, `u32` is a type whose valid values are all the 32-bit unsigned 64 numbers and `s16` is a type whose valid values are all the 16-bit signed 68 --------- 70 The following byteswap functions are direction-agnostic. That is, 74 * be16: Takes an unsigned 16-bit number and converts it between 75 host byte order and big-endian [all …]
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| /Documentation/networking/ |
| D | filter.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 .. _networking-filter: 10 ------ 17 ------------ 24 BPF allows a user-space program to attach a filter onto any socket and 49 The biggest user of this construct might be libpcap. Issuing a high-level 50 filter command like `tcpdump -i em1 port 22` passes through the libpcap 52 via SO_ATTACH_FILTER to the kernel. `tcpdump -i em1 port 22 -ddd` 57 qdisc layer, SECCOMP-BPF (SECure COMPuting [1]_), and lots of other places 60 .. [1] Documentation/userspace-api/seccomp_filter.rst [all …]
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| /Documentation/trace/ |
| D | uprobetracer.rst | 2 Uprobe-tracer: Uprobe-based Event Tracing 9 -------- 13 Similar to the kprobe-event tracer, this doesn't need to be activated via 18 However unlike kprobe-event tracer, the uprobe event interface expects the 19 user to calculate the offset of the probepoint in the object. 26 ------------------------- 29 p[:[GRP/][EVENT]] PATH:OFFSET [FETCHARGS] : Set a uprobe 30 r[:[GRP/][EVENT]] PATH:OFFSET [FETCHARGS] : Set a return uprobe (uretprobe) 31 p[:[GRP/][EVENT]] PATH:OFFSET%return [FETCHARGS] : Set a return uprobe (uretprobe) 32 -:[GRP/][EVENT] : Clear uprobe or uretprobe event [all …]
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| /Documentation/PCI/endpoint/ |
| D | pci-ntb-function.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 PCI Non-Transparent Bridges (NTB) allow two host systems to communicate 26 .. code-block:: text 28 +-------------+ +-------------+ 32 +------^------+ +------^------+ 35 +---------|-------------------------------------------------|---------+ 36 | +------v------+ +------v------+ | 40 | | <-----------------------------------> | | 45 | +-------------+ +-------------+ | 46 +---------------------------------------------------------------------+ [all …]
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| /Documentation/networking/device_drivers/cellular/qualcomm/ |
| D | rmnet.rst | 1 .. SPDX-License-Identifier: GPL-2.0 24 sending aggregated bunch of MAP frames. rmnet driver will de-aggregate 36 Bit 0 1 2-7 8-15 16-31 39 Bit 32-x 62 Bit 0 1 2-7 8-15 16-31 65 Bit 32-(x-33) (x-32)-x 87 Bit 0-14 15 16-31 88 Function Reserved Valid Checksum start offset 90 Bit 31-47 48-64 101 Checksum start offset, Indicates the offset in bytes from the beginning of the [all …]
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| /Documentation/admin-guide/gpio/ |
| D | gpio-mockup.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 8 This module has been obsoleted by the more flexible gpio-sim.rst. 14 The GPIO Testing Driver (gpio-mockup) provides a way to create simulated GPIO 20 -------------------------------------------- 22 When loading the gpio-mockup driver a number of parameters can be passed to the 28 pairs. Each pair defines the base GPIO number (non-negative integer) 30 is -1, the gpiolib will assign it automatically. while the following 33 Example: gpio_mockup_ranges=-1,8,-1,16,405,409 44 The name format is: gpio-mockup-X-Y where X is mockup chip's ID 45 and Y is the line offset. [all …]
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| D | gpio-sim.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO 12 ------------------------ 14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For 21 **Group:** ``/config/gpio-sim`` 23 This is the top directory of the gpio-sim configfs tree. 25 **Group:** ``/config/gpio-sim/gpio-device`` 27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name`` 29 **Attribute:** ``/config/gpio-sim/gpio-device/live`` 32 attribute is read-only and allows the user-space to read the platform device [all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | ti-pci.txt | 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated) 5 Should be "ti,dra7-pcie-ep" for EP (deprecated) 6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode 7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode 8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode 9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode 10 - phys : list of PHY specifiers (used by generic PHY framework) 11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", 14 where <X> is the instance number of the pcie from the HW spec. [all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-chromeos-acpi | 56 Returns firmware version for the read-only portion of the 67 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.0 68 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.0 82 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.1 83 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.1 94 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.2 95 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.2 102 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.3 103 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.3 121 Returns the SHA-1 or SHA-256 hash that is read out of the [all …]
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | ap80x-system-controller.txt | 5 7K/8K/931x SoCs. It contains system controllers, which provide several 6 registers giving access to numerous features: clocks, pin-muxing and 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the AP80x system controller 18 ------- 24 - 0: reference clock of CPU cluster 0 25 - 1: reference clock of CPU cluster 1 26 - 2: fixed PLL at 1200 Mhz 27 - 3: MSS clock, derived from the fixed PLL 31 - compatible: must be one of: [all …]
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marc Zyngier <marc.zyngier@arm.com> 22 - $ref: /schemas/interrupt-controller.yaml# 27 - items: 28 - enum: 29 - arm,arm11mp-gic 30 - arm,cortex-a15-gic [all …]
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| /Documentation/virt/kvm/devices/ |
| D | arm-vgic.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 - KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0 13 controller, requiring emulated user-space devices to inject interrupts to the 18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to 26 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit) 31 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit) 39 -E2BIG Address outside of addressable IPA range 40 -EINVAL Incorrectly aligned address 41 -EEXIST Address already configured 42 -ENXIO The group or attribute is unknown/unsupported for this device [all …]
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| /Documentation/input/devices/ |
| D | iforce-protocol.rst | 7 Home page at `<http://web.archive.org/web/*/http://www.esil.univ-mrs.fr>`_ 16 specify force effects to I-Force 2.0 devices. None of this information comes 25 send data to your I-Force device based on what you read in this document. 30 All values are hexadecimal with big-endian encoding (msb on the left). Beware, 31 values inside packets are encoded using little-endian. Bytes whose roles are 35 ------------------------ 64 00 X-Axis lsb 65 01 X-Axis msb 66 02 Y-Axis lsb, or gas pedal for a wheel 67 03 Y-Axis msb, or brake pedal for a wheel [all …]
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| /Documentation/translations/zh_TW/process/ |
| D | coding-style.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 .. include:: ../disclaimer-zh_TW.rst 5 :Original: Documentation/process/coding-style.rst 10 - 張樂 Zhang Le <r0bertz@gentoo.org> 11 - Andy Deng <theandy.deng@gmail.com> 12 - 吳想成 <bobwxc@email.cn> 15 - 王聰 Wang Cong <xiyou.wangcong@gmail.com> 16 - wheelz <kernel.zeng@gmail.com> 17 - 管旭東 Xudong Guan <xudong.guan@gmail.com> 18 - Li Zefan <lizf@cn.fujitsu.com> [all …]
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| /Documentation/translations/zh_CN/process/ |
| D | coding-style.rst | 1 .. include:: ../disclaimer-zh_CN.rst 3 :Original: Documentation/process/coding-style.rst 8 - 张乐 Zhang Le <r0bertz@gentoo.org> 9 - Andy Deng <theandy.deng@gmail.com> 10 - 吴想成 <bobwxc@email.cn> 13 - 王聪 Wang Cong <xiyou.wangcong@gmail.com> 14 - wheelz <kernel.zeng@gmail.com> 15 - 管旭东 Xudong Guan <xudong.guan@gmail.com> 16 - Li Zefan <lizf@cn.fujitsu.com> 17 - Wang Chen <wangchen@cn.fujitsu.com> [all …]
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x 5 - compatible : Should contain entries for this and backward compatible 9 - reg : Offset and length of the register set for the device 10 - interrupts : the SEC's interrupt number 11 - fsl,num-channels : An integer representing the number of channels 13 - fsl,channel-fifo-len : An integer representing the number of 15 - fsl,exec-units-mask : The bitmask representing what execution units 16 (EUs) are available. It's a single 32-bit cell. EU information 20 bit 0 = reserved - should be 0 23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A) [all …]
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| /Documentation/gpu/ |
| D | msm-crash-dump.rst | 8 /sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data). 14 by a (-). 17 -------- 38 rbbm-status 52 last-fence 55 retired-fence 89 offset 90 Byte offset of the register from the start of the 96 registers-hlsq
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| /Documentation/admin-guide/kdump/ |
| D | kdump.rst | 2 Documentation for Kdump - The kexec-based Crash Dumping Solution 11 Kdump uses kexec to quickly boot to a dump-capture kernel whenever a 14 the reboot and is accessible to the dump-capture kernel. 24 the dump-capture kernel. This ensures that ongoing Direct Memory Access 25 (DMA) from the system kernel does not corrupt the dump-capture kernel. 26 The kexec -p command loads the dump-capture kernel into this reserved 47 passed to the dump-capture kernel through the elfcorehdr= boot 49 when using the elfcorehdr=[size[KMG]@]offset[KMG] syntax. 51 With the dump-capture kernel, you can access the memory image through 52 /proc/vmcore. This exports the dump as an ELF-format file that you can [all …]
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