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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Ebisu/Ebisu-4D board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Renesas Ebisu board";
13	compatible = "renesas,ebisu";
14
15	aliases {
16		i2c0 = &i2c0;
17		i2c1 = &i2c1;
18		i2c2 = &i2c2;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c6 = &i2c6;
23		i2c7 = &i2c7;
24		serial0 = &scif2;
25		ethernet0 = &avb;
26		mmc0 = &sdhi3;
27		mmc1 = &sdhi0;
28		mmc2 = &sdhi1;
29	};
30
31	chosen {
32		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
33		stdout-path = "serial0:115200n8";
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <11289600>;
44	};
45
46	backlight: backlight {
47		compatible = "pwm-backlight";
48		pwms = <&pwm3 0 50000>;
49
50		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
51		default-brightness-level = <10>;
52
53		power-supply = <&reg_12p0v>;
54	};
55
56	cvbs-in {
57		compatible = "composite-video-connector";
58		label = "CVBS IN";
59
60		port {
61			cvbs_con: endpoint {
62				remote-endpoint = <&adv7482_ain7>;
63			};
64		};
65	};
66
67	hdmi-in {
68		compatible = "hdmi-connector";
69		label = "HDMI IN";
70		type = "a";
71
72		port {
73			hdmi_in_con: endpoint {
74				remote-endpoint = <&adv7482_hdmi>;
75			};
76		};
77	};
78
79	hdmi-out {
80		compatible = "hdmi-connector";
81		type = "a";
82
83		port {
84			hdmi_con_out: endpoint {
85				remote-endpoint = <&adv7511_out>;
86			};
87		};
88	};
89
90	keys {
91		compatible = "gpio-keys";
92
93		pinctrl-0 = <&keys_pins>;
94		pinctrl-names = "default";
95
96		key-1 {
97			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
98			linux,code = <KEY_1>;
99			label = "SW4-1";
100			wakeup-source;
101			debounce-interval = <20>;
102		};
103		key-2 {
104			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
105			linux,code = <KEY_2>;
106			label = "SW4-2";
107			wakeup-source;
108			debounce-interval = <20>;
109		};
110		key-3 {
111			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
112			linux,code = <KEY_3>;
113			label = "SW4-3";
114			wakeup-source;
115			debounce-interval = <20>;
116		};
117		key-4 {
118			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
119			linux,code = <KEY_4>;
120			label = "SW4-4";
121			wakeup-source;
122			debounce-interval = <20>;
123		};
124	};
125
126	lvds-decoder {
127		compatible = "thine,thc63lvd1024";
128		vcc-supply = <&reg_3p3v>;
129
130		ports {
131			#address-cells = <1>;
132			#size-cells = <0>;
133
134			port@0 {
135				reg = <0>;
136				thc63lvd1024_in: endpoint {
137					remote-endpoint = <&lvds0_out>;
138				};
139			};
140
141			port@2 {
142				reg = <2>;
143				thc63lvd1024_out: endpoint {
144					remote-endpoint = <&adv7511_in>;
145				};
146			};
147		};
148	};
149
150	memory@48000000 {
151		device_type = "memory";
152		/* first 128MB is reserved for secure area. */
153		reg = <0x0 0x48000000 0x0 0x38000000>;
154	};
155
156	reg_1p8v: regulator-1p8v {
157		compatible = "regulator-fixed";
158		regulator-name = "fixed-1.8V";
159		regulator-min-microvolt = <1800000>;
160		regulator-max-microvolt = <1800000>;
161		regulator-boot-on;
162		regulator-always-on;
163	};
164
165	reg_3p3v: regulator-3p3v {
166		compatible = "regulator-fixed";
167		regulator-name = "fixed-3.3V";
168		regulator-min-microvolt = <3300000>;
169		regulator-max-microvolt = <3300000>;
170		regulator-boot-on;
171		regulator-always-on;
172	};
173
174	reg_12p0v: regulator-12p0v {
175		compatible = "regulator-fixed";
176		regulator-name = "D12.0V";
177		regulator-min-microvolt = <12000000>;
178		regulator-max-microvolt = <12000000>;
179		regulator-boot-on;
180		regulator-always-on;
181	};
182
183	rsnd_ak4613: sound {
184		compatible = "simple-audio-card";
185
186		simple-audio-card,name = "rsnd-ak4613";
187		simple-audio-card,format = "left_j";
188		simple-audio-card,bitclock-master = <&sndcpu>;
189		simple-audio-card,frame-master = <&sndcpu>;
190
191		sndcodec: simple-audio-card,codec {
192			sound-dai = <&ak4613>;
193		};
194
195		sndcpu: simple-audio-card,cpu {
196			sound-dai = <&rcar_sound>;
197		};
198	};
199
200	vbus0_usb2: regulator-vbus0-usb2 {
201		compatible = "regulator-fixed";
202
203		regulator-name = "USB20_VBUS_CN";
204		regulator-min-microvolt = <5000000>;
205		regulator-max-microvolt = <5000000>;
206
207		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
208		enable-active-high;
209	};
210
211	vcc_sdhi0: regulator-vcc-sdhi0 {
212		compatible = "regulator-fixed";
213
214		regulator-name = "SDHI0 Vcc";
215		regulator-min-microvolt = <3300000>;
216		regulator-max-microvolt = <3300000>;
217
218		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
219		enable-active-high;
220	};
221
222	vccq_sdhi0: regulator-vccq-sdhi0 {
223		compatible = "regulator-gpio";
224
225		regulator-name = "SDHI0 VccQ";
226		regulator-min-microvolt = <1800000>;
227		regulator-max-microvolt = <3300000>;
228
229		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
230		gpios-states = <1>;
231		states = <3300000 1>, <1800000 0>;
232	};
233
234	vcc_sdhi1: regulator-vcc-sdhi1 {
235		compatible = "regulator-fixed";
236
237		regulator-name = "SDHI1 Vcc";
238		regulator-min-microvolt = <3300000>;
239		regulator-max-microvolt = <3300000>;
240
241		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
242		enable-active-high;
243	};
244
245	vccq_sdhi1: regulator-vccq-sdhi1 {
246		compatible = "regulator-gpio";
247
248		regulator-name = "SDHI1 VccQ";
249		regulator-min-microvolt = <1800000>;
250		regulator-max-microvolt = <3300000>;
251
252		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
253		gpios-states = <1>;
254		states = <3300000 1>, <1800000 0>;
255	};
256
257	vga {
258		compatible = "vga-connector";
259
260		port {
261			vga_in: endpoint {
262				remote-endpoint = <&adv7123_out>;
263			};
264		};
265	};
266
267	vga-encoder {
268		compatible = "adi,adv7123";
269
270		ports {
271			#address-cells = <1>;
272			#size-cells = <0>;
273
274			port@0 {
275				reg = <0>;
276				adv7123_in: endpoint {
277					remote-endpoint = <&du_out_rgb>;
278				};
279			};
280			port@1 {
281				reg = <1>;
282				adv7123_out: endpoint {
283					remote-endpoint = <&vga_in>;
284				};
285			};
286		};
287	};
288
289	x12_clk: x12 {
290		compatible = "fixed-clock";
291		#clock-cells = <0>;
292		clock-frequency = <24576000>;
293	};
294
295	x13_clk: x13 {
296		compatible = "fixed-clock";
297		#clock-cells = <0>;
298		clock-frequency = <74250000>;
299	};
300};
301
302&audio_clk_a {
303	clock-frequency = <22579200>;
304};
305
306&avb {
307	pinctrl-0 = <&avb_pins>;
308	pinctrl-names = "default";
309	phy-handle = <&phy0>;
310	status = "okay";
311
312	phy0: ethernet-phy@0 {
313		compatible = "ethernet-phy-id0022.1622",
314			     "ethernet-phy-ieee802.3-c22";
315		rxc-skew-ps = <1500>;
316		reg = <0>;
317		interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_LOW>;
318		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
319		/*
320		 * TX clock internal delay mode is required for reliable
321		 * 1Gbps communication using the KSZ9031RNX phy present on
322		 * the Ebisu board, however, TX clock internal delay mode
323		 * isn't supported on R-Car E3(e).  Thus, limit speed to
324		 * 100Mbps for reliable communication.
325		 */
326		max-speed = <100>;
327	};
328};
329
330&canfd {
331	pinctrl-0 = <&canfd0_pins>;
332	pinctrl-names = "default";
333	status = "okay";
334
335	channel0 {
336		status = "okay";
337	};
338};
339
340&csi40 {
341	status = "okay";
342
343	ports {
344		port@0 {
345			csi40_in: endpoint {
346				clock-lanes = <0>;
347				data-lanes = <1 2>;
348				remote-endpoint = <&adv7482_txa>;
349			};
350		};
351	};
352};
353
354&du {
355	pinctrl-0 = <&du_pins>;
356	pinctrl-names = "default";
357	status = "okay";
358
359	clocks = <&cpg CPG_MOD 724>,
360		 <&cpg CPG_MOD 723>,
361		 <&x13_clk>;
362	clock-names = "du.0", "du.1", "dclkin.0";
363
364	ports {
365		port@0 {
366			du_out_rgb: endpoint {
367				remote-endpoint = <&adv7123_in>;
368			};
369		};
370	};
371};
372
373&ehci0 {
374	dr_mode = "otg";
375	status = "okay";
376};
377
378&extal_clk {
379	clock-frequency = <48000000>;
380};
381
382&hsusb {
383	dr_mode = "otg";
384	status = "okay";
385};
386
387&i2c0 {
388	status = "okay";
389
390	io_expander: gpio@20 {
391		compatible = "onnn,pca9654";
392		reg = <0x20>;
393		gpio-controller;
394		#gpio-cells = <2>;
395		interrupt-parent = <&gpio2>;
396		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
397	};
398
399	hdmi-encoder@39 {
400		compatible = "adi,adv7511w";
401		reg = <0x39>;
402		interrupt-parent = <&gpio1>;
403		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
404
405		avdd-supply = <&reg_1p8v>;
406		dvdd-supply = <&reg_1p8v>;
407		pvdd-supply = <&reg_1p8v>;
408		dvdd-3v-supply = <&reg_3p3v>;
409		bgvdd-supply = <&reg_1p8v>;
410
411		adi,input-depth = <8>;
412		adi,input-colorspace = "rgb";
413		adi,input-clock = "1x";
414
415		ports {
416			#address-cells = <1>;
417			#size-cells = <0>;
418
419			port@0 {
420				reg = <0>;
421				adv7511_in: endpoint {
422					remote-endpoint = <&thc63lvd1024_out>;
423				};
424			};
425
426			port@1 {
427				reg = <1>;
428				adv7511_out: endpoint {
429					remote-endpoint = <&hdmi_con_out>;
430				};
431			};
432		};
433	};
434
435	video-receiver@70 {
436		compatible = "adi,adv7482";
437		reg = <0x70>;
438
439		interrupt-parent = <&gpio0>;
440		interrupt-names = "intrq1", "intrq2";
441		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
442			     <17 IRQ_TYPE_LEVEL_LOW>;
443
444		ports {
445			#address-cells = <1>;
446			#size-cells = <0>;
447
448			port@7 {
449				reg = <7>;
450
451				adv7482_ain7: endpoint {
452					remote-endpoint = <&cvbs_con>;
453				};
454			};
455
456			port@8 {
457				reg = <8>;
458
459				adv7482_hdmi: endpoint {
460					remote-endpoint = <&hdmi_in_con>;
461				};
462			};
463
464			port@a {
465				reg = <10>;
466
467				adv7482_txa: endpoint {
468					clock-lanes = <0>;
469					data-lanes = <1 2>;
470					remote-endpoint = <&csi40_in>;
471				};
472			};
473		};
474	};
475};
476
477&i2c3 {
478	status = "okay";
479
480	ak4613: codec@10 {
481		compatible = "asahi-kasei,ak4613";
482		#sound-dai-cells = <0>;
483		reg = <0x10>;
484		clocks = <&rcar_sound 3>;
485
486		asahi-kasei,in1-single-end;
487		asahi-kasei,in2-single-end;
488		asahi-kasei,out1-single-end;
489		asahi-kasei,out2-single-end;
490		asahi-kasei,out3-single-end;
491		asahi-kasei,out4-single-end;
492		asahi-kasei,out5-single-end;
493		asahi-kasei,out6-single-end;
494	};
495
496	cs2000: clk-multiplier@4f {
497		#clock-cells = <0>;
498		compatible = "cirrus,cs2000-cp";
499		reg = <0x4f>;
500		clocks = <&audio_clkout>, <&x12_clk>;
501		clock-names = "clk_in", "ref_clk";
502
503		assigned-clocks = <&cs2000>;
504		assigned-clock-rates = <24576000>; /* 1/1 divide */
505	};
506};
507
508&i2c_dvfs {
509	status = "okay";
510
511	clock-frequency = <400000>;
512
513	pmic: pmic@30 {
514		pinctrl-0 = <&irq0_pins>;
515		pinctrl-names = "default";
516
517		compatible = "rohm,bd9571mwv";
518		reg = <0x30>;
519		interrupt-parent = <&intc_ex>;
520		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
521		interrupt-controller;
522		#interrupt-cells = <2>;
523		gpio-controller;
524		#gpio-cells = <2>;
525		rohm,ddr-backup-power = <0x1>;
526		rohm,rstbmode-level;
527	};
528
529	eeprom@50 {
530		compatible = "rohm,br24t01", "atmel,24c01";
531		reg = <0x50>;
532		pagesize = <8>;
533	};
534};
535
536&lvds0 {
537	status = "okay";
538
539	clocks = <&cpg CPG_MOD 727>,
540		 <&x13_clk>,
541		 <&extal_clk>;
542	clock-names = "fck", "dclkin.0", "extal";
543
544	ports {
545		port@1 {
546			lvds0_out: endpoint {
547				remote-endpoint = <&thc63lvd1024_in>;
548			};
549		};
550	};
551};
552
553&lvds1 {
554	/*
555	 * Even though the LVDS1 output is not connected, the encoder must be
556	 * enabled to supply a pixel clock to the DU for the DPAD output when
557	 * LVDS0 is in use.
558	 */
559	status = "okay";
560
561	clocks = <&cpg CPG_MOD 727>,
562		 <&x13_clk>,
563		 <&extal_clk>;
564	clock-names = "fck", "dclkin.0", "extal";
565};
566
567&ohci0 {
568	dr_mode = "otg";
569	status = "okay";
570};
571
572&pcie_bus_clk {
573	clock-frequency = <100000000>;
574};
575
576&pciec0 {
577	status = "okay";
578};
579
580&pfc {
581	avb_pins: avb {
582		groups = "avb_link", "avb_mii";
583		function = "avb";
584	};
585
586	canfd0_pins: canfd0 {
587		groups = "canfd0_data";
588		function = "canfd0";
589	};
590
591	du_pins: du {
592		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
593		function = "du";
594	};
595
596	irq0_pins: irq0 {
597		groups = "intc_ex_irq0";
598		function = "intc_ex";
599	};
600
601	keys_pins: keys {
602		pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
603		bias-pull-up;
604	};
605
606	pwm3_pins: pwm3 {
607		groups = "pwm3_b";
608		function = "pwm3";
609	};
610
611	pwm5_pins: pwm5 {
612		groups = "pwm5_a";
613		function = "pwm5";
614	};
615
616	rpc_pins: rpc {
617		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
618			 "rpc_int";
619		function = "rpc";
620	};
621
622	scif2_pins: scif2 {
623		groups = "scif2_data_a";
624		function = "scif2";
625	};
626
627	sdhi0_pins: sd0 {
628		groups = "sdhi0_data4", "sdhi0_ctrl";
629		function = "sdhi0";
630		power-source = <3300>;
631	};
632
633	sdhi0_pins_uhs: sd0_uhs {
634		groups = "sdhi0_data4", "sdhi0_ctrl";
635		function = "sdhi0";
636		power-source = <1800>;
637	};
638
639	sdhi1_pins: sd1 {
640		groups = "sdhi1_data4", "sdhi1_ctrl";
641		function = "sdhi1";
642		power-source = <3300>;
643	};
644
645	sdhi1_pins_uhs: sd1_uhs {
646		groups = "sdhi1_data4", "sdhi1_ctrl";
647		function = "sdhi1";
648		power-source = <1800>;
649	};
650
651	sdhi3_pins: sd3 {
652		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
653		function = "sdhi3";
654		power-source = <1800>;
655	};
656
657	sound_clk_pins: sound_clk {
658		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
659			 "audio_clkout_a", "audio_clkout1_a";
660		function = "audio_clk";
661	};
662
663	sound_pins: sound {
664		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
665		function = "ssi";
666	};
667
668	usb0_pins: usb {
669		groups = "usb0_b", "usb0_id";
670		function = "usb0";
671	};
672
673	usb30_pins: usb30 {
674		groups = "usb30";
675		function = "usb30";
676	};
677};
678
679&pwm3 {
680	pinctrl-0 = <&pwm3_pins>;
681	pinctrl-names = "default";
682
683	status = "okay";
684};
685
686&pwm5 {
687	pinctrl-0 = <&pwm5_pins>;
688	pinctrl-names = "default";
689
690	status = "okay";
691};
692
693&rcar_sound {
694	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
695	pinctrl-names = "default";
696
697	/* Single DAI */
698	#sound-dai-cells = <0>;
699
700	/* audio_clkout0/1/2/3 */
701	#clock-cells = <1>;
702	clock-frequency = <12288000 11289600>;
703
704	status = "okay";
705
706	/* update <audio_clk_b> to <cs2000> */
707	clocks = <&cpg CPG_MOD 1005>,
708		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
709		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
710		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
711		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
712		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
713		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
714		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
715		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
716		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
717		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
718		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
719		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
720		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
721		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
722		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
723
724	rcar_sound,dai {
725		dai0 {
726			playback = <&ssi0>, <&src0>, <&dvc0>;
727			capture = <&ssi1>, <&src1>, <&dvc1>;
728		};
729	};
730
731};
732
733&rpc {
734	pinctrl-0 = <&rpc_pins>;
735	pinctrl-names = "default";
736
737	/* Left disabled.  To be enabled by firmware when unlocked. */
738
739	flash@0 {
740		compatible = "cypress,hyperflash", "cfi-flash";
741		reg = <0>;
742
743		partitions {
744			compatible = "fixed-partitions";
745			#address-cells = <1>;
746			#size-cells = <1>;
747
748			bootparam@0 {
749				reg = <0x00000000 0x040000>;
750				read-only;
751			};
752			bl2@40000 {
753				reg = <0x00040000 0x140000>;
754				read-only;
755			};
756			cert_header_sa6@180000 {
757				reg = <0x00180000 0x040000>;
758				read-only;
759			};
760			bl31@1c0000 {
761				reg = <0x001c0000 0x040000>;
762				read-only;
763			};
764			tee@200000 {
765				reg = <0x00200000 0x440000>;
766				read-only;
767			};
768			uboot@640000 {
769				reg = <0x00640000 0x100000>;
770				read-only;
771			};
772			dtb@740000 {
773				reg = <0x00740000 0x080000>;
774			};
775			kernel@7c0000 {
776				reg = <0x007c0000 0x1400000>;
777			};
778			user@1bc0000 {
779				reg = <0x01bc0000 0x2440000>;
780			};
781		};
782	};
783};
784
785&rwdt {
786	timeout-sec = <60>;
787	status = "okay";
788};
789
790&scif2 {
791	pinctrl-0 = <&scif2_pins>;
792	pinctrl-names = "default";
793
794	status = "okay";
795};
796
797&sdhi0 {
798	pinctrl-0 = <&sdhi0_pins>;
799	pinctrl-1 = <&sdhi0_pins_uhs>;
800	pinctrl-names = "default", "state_uhs";
801
802	vmmc-supply = <&vcc_sdhi0>;
803	vqmmc-supply = <&vccq_sdhi0>;
804	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
805	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
806	bus-width = <4>;
807	sd-uhs-sdr50;
808	sd-uhs-sdr104;
809	status = "okay";
810};
811
812&sdhi1 {
813	pinctrl-0 = <&sdhi1_pins>;
814	pinctrl-1 = <&sdhi1_pins_uhs>;
815	pinctrl-names = "default", "state_uhs";
816
817	vmmc-supply = <&vcc_sdhi1>;
818	vqmmc-supply = <&vccq_sdhi1>;
819	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
820	bus-width = <4>;
821	sd-uhs-sdr50;
822	sd-uhs-sdr104;
823	status = "okay";
824};
825
826&sdhi3 {
827	/* used for on-board 8bit eMMC */
828	pinctrl-0 = <&sdhi3_pins>;
829	pinctrl-1 = <&sdhi3_pins>;
830	pinctrl-names = "default", "state_uhs";
831
832	vmmc-supply = <&reg_3p3v>;
833	vqmmc-supply = <&reg_1p8v>;
834	mmc-hs200-1_8v;
835	mmc-hs400-1_8v;
836	bus-width = <8>;
837	no-sd;
838	no-sdio;
839	non-removable;
840	full-pwr-cycle-in-suspend;
841	status = "okay";
842};
843
844&ssi1 {
845	shared-pin;
846};
847
848&usb2_phy0 {
849	pinctrl-0 = <&usb0_pins>;
850	pinctrl-names = "default";
851
852	vbus-supply = <&vbus0_usb2>;
853	status = "okay";
854};
855
856&usb3_peri0 {
857	companion = <&xhci0>;
858	status = "okay";
859};
860
861&vin4 {
862	status = "okay";
863};
864
865&vin5 {
866	status = "okay";
867};
868
869&xhci0 {
870	pinctrl-0 = <&usb30_pins>;
871	pinctrl-names = "default";
872
873	status = "okay";
874};
875