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Searched refs:alignment (Results 1 – 25 of 123) sorted by relevance

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/drivers/misc/
Dpci_endpoint_test.c124 size_t alignment; member
130 size_t alignment; member
367 struct pci_endpoint_test_xfer_param *param, size_t alignment) in pci_endpoint_test_validate_xfer_params() argument
374 if (param->size > SIZE_MAX - alignment) { in pci_endpoint_test_validate_xfer_params()
401 size_t alignment = test->alignment; in pci_endpoint_test_copy() local
413 err = pci_endpoint_test_validate_xfer_params(dev, &param, alignment); in pci_endpoint_test_copy()
428 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL); in pci_endpoint_test_copy()
435 get_random_bytes(orig_src_addr, size + alignment); in pci_endpoint_test_copy()
437 size + alignment, DMA_TO_DEVICE); in pci_endpoint_test_copy()
444 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) { in pci_endpoint_test_copy()
[all …]
/drivers/gpu/drm/i915/
Di915_gem_gtt.c192 u64 size, u64 alignment, unsigned long color, in i915_gem_gtt_insert() argument
203 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); in i915_gem_gtt_insert()
204 GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); in i915_gem_gtt_insert()
214 if (unlikely(round_up(start, alignment) > round_down(end - size, alignment))) in i915_gem_gtt_insert()
230 if (alignment <= I915_GTT_MIN_ALIGNMENT) in i915_gem_gtt_insert()
231 alignment = 0; in i915_gem_gtt_insert()
234 size, alignment, color, in i915_gem_gtt_insert()
241 size, alignment, color, in i915_gem_gtt_insert()
275 size, alignment ?: I915_GTT_MIN_ALIGNMENT); in i915_gem_gtt_insert()
284 err = i915_gem_evict_something(vm, ww, size, alignment, color, in i915_gem_gtt_insert()
[all …]
Di915_vma.c688 u64 size, u64 alignment, u64 flags) in i915_vma_misplaced() argument
699 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); in i915_vma_misplaced()
700 if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment)) in i915_vma_misplaced()
789 u64 size, u64 alignment, u64 flags) in i915_vma_insert() argument
800 alignment = max_t(typeof(alignment), alignment, vma->display_alignment); in i915_vma_insert()
803 alignment = max_t(typeof(alignment), in i915_vma_insert()
804 alignment, vma->fence_alignment); in i915_vma_insert()
808 GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); in i915_vma_insert()
809 GEM_BUG_ON(!is_power_of_2(alignment)); in i915_vma_insert()
821 guard = ALIGN(guard, alignment); in i915_vma_insert()
[all …]
Di915_vma.h260 u64 size, u64 alignment, u64 flags);
290 u64 size, u64 alignment, u64 flags);
293 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) in i915_vma_pin() argument
302 err = i915_vma_pin_ww(vma, &ww, size, alignment, flags); in i915_vma_pin()
Di915_gem.h59 u64 size, u64 alignment, u64 flags);
64 u64 size, u64 alignment, u64 flags);
/drivers/gpu/drm/i915/display/
Dintel_fb_pin.c23 unsigned int alignment, in intel_fb_pin_to_dpt() argument
78 if (i915_vma_misplaced(vma, 0, alignment, 0)) { in intel_fb_pin_to_dpt()
84 ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL); in intel_fb_pin_to_dpt()
93 vma->display_alignment = max(vma->display_alignment, alignment); in intel_fb_pin_to_dpt()
107 unsigned int alignment, in intel_fb_pin_to_ggtt() argument
124 if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment))) in intel_fb_pin_to_ggtt()
132 if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024) in intel_fb_pin_to_ggtt()
133 alignment = 256 * 1024; in intel_fb_pin_to_ggtt()
170 vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment, in intel_fb_pin_to_ggtt()
281 unsigned int alignment = intel_plane_fb_min_alignment(plane_state); in intel_plane_pin_fb() local
[all …]
Dintel_fb.c994 unsigned int alignment) in intel_compute_aligned_offset() argument
1022 if (alignment) in intel_compute_aligned_offset()
1023 offset_aligned = rounddown(offset_aligned, alignment); in intel_compute_aligned_offset()
1031 if (alignment) { in intel_compute_aligned_offset()
1032 offset_aligned = rounddown(offset_aligned, alignment); in intel_compute_aligned_offset()
1033 *y = (offset % alignment) / pitch; in intel_compute_aligned_offset()
1034 *x = ((offset % alignment) - *y * pitch) / cpp; in intel_compute_aligned_offset()
1052 unsigned int alignment = plane->min_alignment(plane, fb, color_plane); in intel_plane_compute_aligned_offset() local
1055 pitch, rotation, alignment); in intel_plane_compute_aligned_offset()
1064 unsigned int height, alignment, unused; in intel_fb_offset_to_xy() local
[all …]
/drivers/gpu/drm/msm/disp/dpu1/
Dmsm_media_info.h1072 unsigned int alignment = 0, bpp = 4; in VENUS_RGB_STRIDE() local
1079 alignment = 128; in VENUS_RGB_STRIDE()
1082 alignment = 256; in VENUS_RGB_STRIDE()
1087 alignment = 256; in VENUS_RGB_STRIDE()
1093 return MSM_MEDIA_ALIGN(width * bpp, alignment); in VENUS_RGB_STRIDE()
1098 unsigned int alignment = 0; in VENUS_RGB_SCANLINES() local
1105 alignment = 32; in VENUS_RGB_SCANLINES()
1110 alignment = 16; in VENUS_RGB_SCANLINES()
1116 return MSM_MEDIA_ALIGN(height, alignment); in VENUS_RGB_SCANLINES()
/drivers/gpu/drm/tests/
Ddrm_mm_test.c92 static u64 misalignment(struct drm_mm_node *node, u64 alignment) in misalignment() argument
96 if (!alignment) in misalignment()
99 div64_u64_rem(node->start, alignment, &rem); in misalignment()
104 u64 size, u64 alignment, unsigned long color) in assert_node() argument
119 if (misalignment(node, alignment)) { in assert_node()
122 node->start, misalignment(node, alignment), alignment); in assert_node()
218 struct drm_mm_node *node, u64 size, u64 alignment, unsigned long color, in expect_insert() argument
224 size, alignment, color, in expect_insert()
229 size, alignment, color, mode->name, err); in expect_insert()
233 if (!assert_node(test, node, mm, size, alignment, color)) { in expect_insert()
/drivers/bluetooth/
Dhci_h4.c159 u8 alignment = hu->alignment ? hu->alignment : 1; in h4_recv_buf() local
255 hu->padding = (skb->len + 1) % alignment; in h4_recv_buf()
256 hu->padding = (alignment - hu->padding) % alignment; in h4_recv_buf()
263 hu->padding = (skb->len + 1) % alignment; in h4_recv_buf()
264 hu->padding = (alignment - hu->padding) % alignment; in h4_recv_buf()
/drivers/gpu/drm/
Ddrm_mm.c516 u64 size, u64 alignment, in drm_mm_insert_node_in_range() argument
533 if (alignment <= 1) in drm_mm_insert_node_in_range()
534 alignment = 0; in drm_mm_insert_node_in_range()
539 remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0; in drm_mm_insert_node_in_range()
568 if (alignment) { in drm_mm_insert_node_in_range()
574 div64_u64_rem(adj_start, alignment, &rem); in drm_mm_insert_node_in_range()
578 adj_start += alignment; in drm_mm_insert_node_in_range()
704 u64 alignment, in drm_mm_scan_init_with_range() argument
716 if (alignment <= 1) in drm_mm_scan_init_with_range()
717 alignment = 0; in drm_mm_scan_init_with_range()
[all …]
/drivers/mtd/ubi/
Dvmt.c34 __ATTR(alignment, S_IRUGO, vol_attribute_show, NULL);
85 ret = sprintf(buf, "%d\n", vol->alignment); in vol_attribute_show()
228 vol->usable_leb_size = ubi->leb_size - ubi->leb_size % req->alignment; in ubi_create_volume()
247 vol->alignment = req->alignment; in ubi_create_volume()
248 vol->data_pad = ubi->leb_size % vol->alignment; in ubi_create_volume()
307 vtbl_rec.alignment = cpu_to_be32(vol->alignment); in ubi_create_volume()
684 int reserved_pebs, alignment, data_pad, vol_type, name_len, upd_marker; in self_check_volume() local
702 if (vol->reserved_pebs < 0 || vol->alignment < 0 || vol->data_pad < 0 || in self_check_volume()
707 if (vol->alignment > ubi->leb_size || vol->alignment == 0) { in self_check_volume()
712 n = vol->alignment & (ubi->min_io_size - 1); in self_check_volume()
[all …]
Dvtbl.c160 int i, n, reserved_pebs, alignment, data_pad, vol_type, name_len; in vtbl_check() local
169 alignment = be32_to_cpu(vtbl[i].alignment); in vtbl_check()
193 if (reserved_pebs < 0 || alignment < 0 || data_pad < 0 || in vtbl_check()
199 if (alignment > ubi->leb_size || alignment == 0) { in vtbl_check()
204 n = alignment & (ubi->min_io_size - 1); in vtbl_check()
205 if (alignment != 1 && n) { in vtbl_check()
210 n = ubi->leb_size % alignment; in vtbl_check()
539 vol->alignment = be32_to_cpu(vtbl[i].alignment); in init_volumes()
631 vol->alignment = UBI_LAYOUT_VOLUME_ALIGN; in init_volumes()
/drivers/gpu/drm/qxl/
Dqxl_gem.c46 int alignment, int initial_domain, in qxl_gem_object_create() argument
56 if (alignment < PAGE_SIZE) in qxl_gem_object_create()
57 alignment = PAGE_SIZE; in qxl_gem_object_create()
63 size, initial_domain, alignment, r); in qxl_gem_object_create()
/drivers/gpu/drm/xe/
Dxe_ggtt.c622 u64 alignment = bo->min_align > 0 ? bo->min_align : XE_PAGE_SIZE; in __xe_ggtt_insert_bo_at() local
627 alignment = SZ_64K; in __xe_ggtt_insert_bo_at()
650 bo->size, alignment, 0, start, end, 0); in __xe_ggtt_insert_bo_at()
722 u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare) in xe_ggtt_largest_hole() argument
734 hole_start = ALIGN(hole_start, alignment); in xe_ggtt_largest_hole()
735 hole_end = ALIGN_DOWN(hole_end, alignment); in xe_ggtt_largest_hole()
822 u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p) in xe_ggtt_print_holes() argument
835 hole_start = ALIGN(hole_start, alignment); in xe_ggtt_print_holes()
836 hole_end = ALIGN_DOWN(hole_end, alignment); in xe_ggtt_print_holes()
Dxe_ggtt.h32 u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
35 u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
/drivers/dma/
Ddmatest.c83 static int alignment = -1; variable
84 module_param(alignment, int, 0644);
85 MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not use…
126 int alignment; member
621 align = params->alignment < 0 ? dev->copy_align : in dmatest_func()
622 params->alignment; in dmatest_func()
625 align = params->alignment < 0 ? dev->fill_align : in dmatest_func()
626 params->alignment; in dmatest_func()
633 align = params->alignment < 0 ? dev->xor_align : in dmatest_func()
634 params->alignment; in dmatest_func()
[all …]
/drivers/crypto/nx/
Dnx-842.c183 if (adj_slen > slen || (u64)src % c->alignment) { in compress()
197 if ((u64)dst % c->alignment) { in compress()
198 dskip = (int)(PTR_ALIGN(dst, c->alignment) - dst); in compress()
284 (u64)p.in % c.alignment || in nx842_crypto_compress()
288 (u64)p.out % c.alignment); in nx842_crypto_compress()
369 if (slen < adj_slen || (u64)src % c->alignment) { in decompress()
385 if (dlen < required_len || (u64)dst % c->alignment) { in decompress()
/drivers/iommu/arm/arm-smmu-v3/pkvm/
Dio-pgtable-arm.c103 size_t pgd_size, alignment; in kvm_arm_io_pgtable_alloc() local
127 alignment = max(pgd_size, 8 * sizeof(arm_lpae_iopte)); in kvm_arm_io_pgtable_alloc()
128 if (!IS_ALIGNED(hyp_virt_to_phys(data->pgd), alignment)) { in kvm_arm_io_pgtable_alloc()
/drivers/gpu/drm/i915/gem/
Di915_gem_stolen.h19 unsigned alignment);
22 unsigned alignment, u64 start,
/drivers/ps3/
Dps3stor_lib.c138 int error, res, alignment; in ps3stor_setup() local
166 alignment = min(__ffs(dev->bounce_size), in ps3stor_setup()
168 if (alignment < 12) { in ps3stor_setup()
174 } else if (alignment < 16) in ps3stor_setup()
/drivers/scsi/pm8001/
Dpm8001_init.c189 pm8001_ha->memoryMap.region[i].alignment), in pm8001_free()
345 pm8001_ha->memoryMap.region[AAP1].alignment = 32; in pm8001_alloc()
351 pm8001_ha->memoryMap.region[IOP].alignment = 32; in pm8001_alloc()
360 pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4; in pm8001_alloc()
370 pm8001_ha->memoryMap.region[ib_offset+i].alignment in pm8001_alloc()
379 pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64; in pm8001_alloc()
390 pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4; in pm8001_alloc()
400 pm8001_ha->memoryMap.region[ob_offset+i].alignment in pm8001_alloc()
410 pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64; in pm8001_alloc()
425 pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000; in pm8001_alloc()
[all …]
/drivers/phy/starfive/
Dphy-jh7110-dphy-tx.c236 unsigned long alignment = STF_DPHY_BITRATE_ALIGN; in stf_dphy_configure() local
241 if (bitrate % alignment) in stf_dphy_configure()
242 bitrate += alignment - (bitrate % alignment); in stf_dphy_configure()
/drivers/firmware/efi/libstub/
Drelocate.c117 unsigned long alignment, in efi_relocate_kernel() argument
150 status = efi_low_alloc_above(alloc_size, alignment, &new_addr, in efi_relocate_kernel()
/drivers/clk/tegra/
Dclk-dfll.c766 int vstep = td->soc->alignment.step_uv; in dfll_init_out_if()
805 align_step = dev_pm_opp_get_voltage(opp) / td->soc->alignment.step_uv; in find_lut_index_for_rate()
809 if ((td->lut_uv[i] / td->soc->alignment.step_uv) >= align_step) in find_lut_index_for_rate()
1591 align_step = uV / td->soc->alignment.step_uv; in find_vdd_map_entry_exact()
1598 reg_volt_id = reg_uV / td->soc->alignment.step_uv; in find_vdd_map_entry_exact()
1619 align_step = uV / td->soc->alignment.step_uv; in find_vdd_map_entry_min()
1626 reg_volt_id = reg_uV / td->soc->alignment.step_uv; in find_vdd_map_entry_min()
1851 if (!td->soc->alignment.step_uv || !td->soc->alignment.offset_uv) { in dfll_fetch_pwm_params()
1857 td->lut_uv[i] = td->soc->alignment.offset_uv + in dfll_fetch_pwm_params()
1858 i * td->soc->alignment.step_uv; in dfll_fetch_pwm_params()

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