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Searched refs:amdgpu_gfx_cp_init_microcode (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c714 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP); in gfx_v11_0_init_microcode()
715 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP_P0_STACK); in gfx_v11_0_init_microcode()
716 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP_P1_STACK); in gfx_v11_0_init_microcode()
718 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP); in gfx_v11_0_init_microcode()
726 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME); in gfx_v11_0_init_microcode()
727 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME_P0_STACK); in gfx_v11_0_init_microcode()
728 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME_P1_STACK); in gfx_v11_0_init_microcode()
730 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME); in gfx_v11_0_init_microcode()
759 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_MEC); in gfx_v11_0_init_microcode()
760 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_MEC_P0_STACK); in gfx_v11_0_init_microcode()
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Damdgpu_gfx.h563 void amdgpu_gfx_cp_init_microcode(struct amdgpu_device *adev, uint32_t ucode_id);
Dgfx_v12_0.c590 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP); in gfx_v12_0_init_microcode()
591 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP_P0_STACK); in gfx_v12_0_init_microcode()
597 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME); in gfx_v12_0_init_microcode()
598 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_ME_P0_STACK); in gfx_v12_0_init_microcode()
617 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_MEC); in gfx_v12_0_init_microcode()
618 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_MEC_P0_STACK); in gfx_v12_0_init_microcode()
619 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_MEC_P1_STACK); in gfx_v12_0_init_microcode()
Dgfx_v9_0.c1436 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP); in gfx_v9_0_init_cp_gfx_microcode()
1442 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME); in gfx_v9_0_init_cp_gfx_microcode()
1448 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE); in gfx_v9_0_init_cp_gfx_microcode()
1529 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1); in gfx_v9_0_init_cp_compute_microcode()
1530 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT); in gfx_v9_0_init_cp_compute_microcode()
1540 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2); in gfx_v9_0_init_cp_compute_microcode()
1541 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT); in gfx_v9_0_init_cp_compute_microcode()
Dgfx_v10_0.c4138 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP); in gfx_v10_0_init_microcode()
4144 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME); in gfx_v10_0_init_microcode()
4150 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE); in gfx_v10_0_init_microcode()
4173 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1); in gfx_v10_0_init_microcode()
4174 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT); in gfx_v10_0_init_microcode()
4179 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2); in gfx_v10_0_init_microcode()
4180 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT); in gfx_v10_0_init_microcode()
Damdgpu_gfx.c1188 void amdgpu_gfx_cp_init_microcode(struct amdgpu_device *adev, in amdgpu_gfx_cp_init_microcode() function
Dgfx_v9_4_3.c587 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1); in gfx_v9_4_3_init_cp_compute_microcode()
588 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT); in gfx_v9_4_3_init_cp_compute_microcode()