| /drivers/net/ethernet/marvell/octeontx2/af/ |
| D | rvu_npc_hash.c | 476 for (i = 0; i < table->mem_table.ways; i++) { in rvu_npc_exact_alloc_mem_table_entry()
784 static int rvu_npc_exact_add_to_list(struct rvu *rvu, enum npc_exact_opc_type opc_type, u8 ways, in rvu_npc_exact_add_to_list() argument
792 WARN_ON(ways >= NPC_EXACT_TBL_MAX_WAYS); in rvu_npc_exact_add_to_list()
814 lhead = &table->lhead_mem_tbl_entry[ways]; in rvu_npc_exact_add_to_list()
832 entry->ways = ways; in rvu_npc_exact_add_to_list()
872 static void rvu_npc_exact_mem_table_write(struct rvu *rvu, int blkaddr, u8 ways, in rvu_npc_exact_mem_table_write() argument
875 rvu_write64(rvu, blkaddr, NPC_AF_EXACT_MEM_ENTRY(ways, index), mdata); in rvu_npc_exact_mem_table_write()
900 u8 ways, u32 index) in rvu_npc_exact_dealloc_table_entry() argument
922 __func__, ways, index); in rvu_npc_exact_dealloc_table_entry()
933 if (!test_bit(index + ways * depth, table->mem_table.bmap)) { in rvu_npc_exact_dealloc_table_entry()
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| D | rvu_npc_hash.h | 161 u8 ways; member
178 int ways; member
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| D | rvu_debugfs.c | 3455 for (i = 0; i < table->mem_table.ways; i++) { in rvu_dbg_npc_exact_show_entries()
3463 for (i = 0; i < table->mem_table.ways; i++) in rvu_dbg_npc_exact_show_entries()
3471 for (j = 0; j < table->mem_table.ways; j++) { in rvu_dbg_npc_exact_show_entries()
3486 for (j = 0; j < table->mem_table.ways; j++) { in rvu_dbg_npc_exact_show_entries()
3543 seq_printf(s, "Ways : %d\n", table->mem_table.ways); in rvu_dbg_npc_exact_show_info()
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| /drivers/cxl/ |
| D | cxl.h | 92 static inline int eiw_to_ways(u8 eiw, unsigned int *ways) in eiw_to_ways() argument
96 *ways = 1 << eiw; in eiw_to_ways()
99 *ways = 3 << (eiw - 8); in eiw_to_ways()
117 static inline int ways_to_eiw(unsigned int ways, u8 *eiw) in ways_to_eiw() argument
119 if (ways > 16) in ways_to_eiw()
121 if (is_power_of_2(ways)) { in ways_to_eiw()
122 *eiw = ilog2(ways); in ways_to_eiw()
125 if (ways % 3) in ways_to_eiw()
127 ways /= 3; in ways_to_eiw()
128 if (!is_power_of_2(ways)) in ways_to_eiw()
[all …]
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| D | acpi.c | 136 unsigned int ways; in cxl_acpi_cfmws_verify() local
155 rc = eiw_to_ways(cfmws->interleave_ways, &ways); in cxl_acpi_cfmws_verify()
162 expected_len = struct_size(cfmws, interleave_targets, ways); in cxl_acpi_cfmws_verify()
351 unsigned int ways, i, ig; in DEFINE_FREE() local
358 rc = eiw_to_ways(cfmws->interleave_ways, &ways); in DEFINE_FREE()
364 for (i = 0; i < ways; i++) in DEFINE_FREE()
378 cxl_root_decoder_alloc(root_port, ways); in DEFINE_FREE()
390 cxld->interleave_ways = ways; in DEFINE_FREE()
395 if (ways == 1) in DEFINE_FREE()
400 if (ways != 1 && ways != 3) { in DEFINE_FREE()
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| /drivers/cxl/core/ |
| D | hdm.c | 582 int ways = cxlsd->cxld.interleave_ways; in cxlsd_set_targets() local
585 if (ways > 1) in cxlsd_set_targets()
587 if (ways > 2) in cxlsd_set_targets()
589 if (ways > 3) in cxlsd_set_targets()
591 if (ways > 4) in cxlsd_set_targets()
593 if (ways > 5) in cxlsd_set_targets()
595 if (ways > 6) in cxlsd_set_targets()
597 if (ways > 7) in cxlsd_set_targets()
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| D | region.c | 1753 int *pos, int *ways) in find_pos_and_ways() argument
1773 *ways = cxlsd->cxld.interleave_ways; in find_pos_and_ways()
1775 for (int i = 0; i < *ways; i++) { in find_pos_and_ways()
2869 int ways = p->interleave_ways; in cxl_is_hpa_in_chunk() local
2874 offset = do_div(offset, gran * ways); in cxl_is_hpa_in_chunk()
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| /drivers/gpu/drm/i915/soc/ |
| D | intel_dram.c | 742 static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; in gen9_edram_size_mb() local
746 ways[EDRAM_WAYS_IDX(cap)] * in gen9_edram_size_mb()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| D | dcn401_hwseq.c | 1306 uint8_t ways, i; in dcn401_apply_idle_power_optimizations() local
1339 ways = dcn401_calculate_cab_allocation(dc, dc->current_state); in dcn401_apply_idle_power_optimizations()
1357 if (ways <= dc->caps.cache_num_ways && !mall_ss_unsupported) { in dcn401_apply_idle_power_optimizations()
1359 cmd.cab.cab_alloc_ways = ways; in dcn401_apply_idle_power_optimizations()
1360 DC_LOG_MALL("cab allocation: %d ways. CAB action: DCN_SS_FIT_IN_CAB\n", ways); in dcn401_apply_idle_power_optimizations()
1363 …LOG_MALL("frame does not fit in CAB: %d ways required. CAB action: DCN_SS_NOT_FIT_IN_CAB\n", ways); in dcn401_apply_idle_power_optimizations()
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| /drivers/edac/ |
| D | skx_base.c | 395 static u64 skx_do_interleave(u64 addr, int shift, int ways, u64 lowbits) in skx_do_interleave() argument
398 addr /= ways; in skx_do_interleave()
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| D | sb_edac.c | 1159 int *ways) in knl_get_tad() argument
1191 *ways = knl_tad_ways[way_id]; in knl_get_tad()
1193 *ways = 0; in knl_get_tad()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| D | dcn32_hwseq.c | 256 uint32_t ways; in dcn32_apply_idle_power_optimizations() local
293 ways = dcn32_calculate_cab_allocation(dc, dc->current_state); in dcn32_apply_idle_power_optimizations()
311 if (ways <= dc->caps.cache_num_ways && !mall_ss_unsupported) { in dcn32_apply_idle_power_optimizations()
316 cmd.cab.cab_alloc_ways = (uint8_t)ways; in dcn32_apply_idle_power_optimizations()
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| /drivers/gpio/ |
| D | TODO | 150 There are already ways to use pin control as back-end for GPIO and
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| /drivers/usb/gadget/legacy/ |
| D | Kconfig | 125 several ways:
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| /drivers/md/ |
| D | Kconfig | 621 them to replay the log in a variety of ways and to check the
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| /drivers/crypto/ |
| D | Kconfig | 148 PAES but the CCA and EP11 handler provide alternate ways to
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| /drivers/scsi/aic7xxx/ |
| D | aic79xx.reg | 4237 * Sense buffer mapping can be handled in either of two ways.
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| /drivers/watchdog/ |
| D | Kconfig | 1505 the watchdog. If you have a card that behave in similar ways,
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