| /include/linux/ |
| D | sh_clk.h | 151 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ argument
154 .enable_reg = (void __iomem *)_reg, \
175 #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ argument
178 .enable_reg = (void __iomem *)_reg, \
188 #define SH_CLK_DIV6(_parent, _reg, _flags) \ argument
191 .enable_reg = (void __iomem *)_reg, \
205 #define SH_CLK_FSIDIV(_reg, _parent) \ argument
207 .enable_reg = (void __iomem *)_reg, \
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| D | bitfield.h | 63 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
73 __bf_cast_unsigned(_reg, ~0ull), \
153 #define FIELD_GET(_mask, _reg) \ argument
155 __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
156 (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
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| D | regmap.h | 96 #define REG_SEQ(_reg, _def, _delay_us) { \ argument
97 .reg = _reg, \
101 #define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) argument
1357 #define REG_FIELD(_reg, _lsb, _msb) { \ argument
1358 .reg = _reg, \
1363 #define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ argument
1364 .reg = _reg, \
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| D | tracepoint.h | 341 #define DEFINE_TRACE_FN(_name, _reg, _unreg, proto, args) \ argument
355 .regfunc = _reg, \
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| /include/linux/mfd/ |
| D | max77650.h | 52 #define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK) argument
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| /include/linux/soc/mediatek/ |
| D | mtk_wed.h | 280 #define mtk_wed_device_reg_read(_dev, _reg) \ argument
281 (_dev)->ops->reg_read(_dev, _reg)
282 #define mtk_wed_device_reg_write(_dev, _reg, _val) \ argument
283 (_dev)->ops->reg_write(_dev, _reg, _val)
316 #define mtk_wed_device_reg_read(_dev, _reg) 0 argument
317 #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) argument
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| /include/trace/hooks/ |
| D | vendor_hooks.h | 22 #define DEFINE_HOOK_FN(_name, _reg, _unreg, proto, args) \ argument
34 .regfunc = _reg, \
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| /include/sound/ |
| D | cs35l41.h | 860 #define CS35L41_REG_IRQ(_reg, _irq) \ argument
862 .reg_offset = (CS35L41_ ## _reg) - CS35L41_IRQ1_STATUS1,\
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