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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  linux/include/linux/mmc/card.h
4  *
5  *  Card driver specific definitions.
6  */
7 #ifndef LINUX_MMC_CARD_H
8 #define LINUX_MMC_CARD_H
9 
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/android_kabi.h>
13 
14 struct mmc_cid {
15 	unsigned int		manfid;
16 	char			prod_name[8];
17 	unsigned char		prv;
18 	unsigned int		serial;
19 	unsigned short		oemid;
20 	unsigned short		year;
21 	unsigned char		hwrev;
22 	unsigned char		fwrev;
23 	unsigned char		month;
24 };
25 
26 struct mmc_csd {
27 	unsigned char		structure;
28 	unsigned char		mmca_vsn;
29 	unsigned short		cmdclass;
30 	unsigned short		taac_clks;
31 	unsigned int		taac_ns;
32 	unsigned int		c_size;
33 	unsigned int		r2w_factor;
34 	unsigned int		max_dtr;
35 	unsigned int		erase_size;		/* In sectors */
36 	unsigned int		wp_grp_size;
37 	unsigned int		read_blkbits;
38 	unsigned int		write_blkbits;
39 	sector_t		capacity;
40 	unsigned int		read_partial:1,
41 				read_misalign:1,
42 				write_partial:1,
43 				write_misalign:1,
44 				dsr_imp:1;
45 };
46 
47 struct mmc_ext_csd {
48 	u8			rev;
49 	u8			erase_group_def;
50 	u8			sec_feature_support;
51 	u8			rel_sectors;
52 	u8			rel_param;
53 	bool			enhanced_rpmb_supported;
54 	u8			part_config;
55 	u8			cache_ctrl;
56 	u8			rst_n_function;
57 	unsigned int		part_time;		/* Units: ms */
58 	unsigned int		sa_timeout;		/* Units: 100ns */
59 	unsigned int		generic_cmd6_time;	/* Units: 10ms */
60 	unsigned int            power_off_longtime;     /* Units: ms */
61 	u8			power_off_notification;	/* state */
62 	unsigned int		hs_max_dtr;
63 	unsigned int		hs200_max_dtr;
64 #define MMC_HIGH_26_MAX_DTR	26000000
65 #define MMC_HIGH_52_MAX_DTR	52000000
66 #define MMC_HIGH_DDR_MAX_DTR	52000000
67 #define MMC_HS200_MAX_DTR	200000000
68 	unsigned int		sectors;
69 	unsigned int		hc_erase_size;		/* In sectors */
70 	unsigned int		hc_erase_timeout;	/* In milliseconds */
71 	unsigned int		sec_trim_mult;	/* Secure trim multiplier  */
72 	unsigned int		sec_erase_mult;	/* Secure erase multiplier */
73 	unsigned int		trim_timeout;		/* In milliseconds */
74 	bool			partition_setting_completed;	/* enable bit */
75 	unsigned long long	enhanced_area_offset;	/* Units: Byte */
76 	unsigned int		enhanced_area_size;	/* Units: KB */
77 	unsigned int		cache_size;		/* Units: KB */
78 	bool			hpi_en;			/* HPI enablebit */
79 	bool			hpi;			/* HPI support bit */
80 	unsigned int		hpi_cmd;		/* cmd used as HPI */
81 	bool			bkops;		/* background support bit */
82 	bool			man_bkops_en;	/* manual bkops enable bit */
83 	bool			auto_bkops_en;	/* auto bkops enable bit */
84 	unsigned int            data_sector_size;       /* 512 bytes or 4KB */
85 	unsigned int            data_tag_unit_size;     /* DATA TAG UNIT size */
86 	unsigned int		boot_ro_lock;		/* ro lock support */
87 	bool			boot_ro_lockable;
88 	bool			ffu_capable;	/* Firmware upgrade support */
89 	bool			cmdq_en;	/* Command Queue enabled */
90 	bool			cmdq_support;	/* Command Queue supported */
91 	unsigned int		cmdq_depth;	/* Command Queue depth */
92 #define MMC_FIRMWARE_LEN 8
93 	u8			fwrev[MMC_FIRMWARE_LEN];  /* FW version */
94 	u8			raw_exception_status;	/* 54 */
95 	u8			raw_partition_support;	/* 160 */
96 	u8			raw_rpmb_size_mult;	/* 168 */
97 	u8			raw_erased_mem_count;	/* 181 */
98 	u8			strobe_support;		/* 184 */
99 	u8			raw_ext_csd_structure;	/* 194 */
100 	u8			raw_card_type;		/* 196 */
101 	u8			raw_driver_strength;	/* 197 */
102 	u8			out_of_int_time;	/* 198 */
103 	u8			raw_pwr_cl_52_195;	/* 200 */
104 	u8			raw_pwr_cl_26_195;	/* 201 */
105 	u8			raw_pwr_cl_52_360;	/* 202 */
106 	u8			raw_pwr_cl_26_360;	/* 203 */
107 	u8			raw_s_a_timeout;	/* 217 */
108 	u8			raw_hc_erase_gap_size;	/* 221 */
109 	u8			raw_erase_timeout_mult;	/* 223 */
110 	u8			raw_hc_erase_grp_size;	/* 224 */
111 	u8			raw_boot_mult;		/* 226 */
112 	u8			raw_sec_trim_mult;	/* 229 */
113 	u8			raw_sec_erase_mult;	/* 230 */
114 	u8			raw_sec_feature_support;/* 231 */
115 	u8			raw_trim_mult;		/* 232 */
116 	u8			raw_pwr_cl_200_195;	/* 236 */
117 	u8			raw_pwr_cl_200_360;	/* 237 */
118 	u8			raw_pwr_cl_ddr_52_195;	/* 238 */
119 	u8			raw_pwr_cl_ddr_52_360;	/* 239 */
120 	u8			raw_pwr_cl_ddr_200_360;	/* 253 */
121 	u8			raw_bkops_status;	/* 246 */
122 	u8			raw_sectors[4];		/* 212 - 4 bytes */
123 	u8			pre_eol_info;		/* 267 */
124 	u8			device_life_time_est_typ_a;	/* 268 */
125 	u8			device_life_time_est_typ_b;	/* 269 */
126 
127 	unsigned int            feature_support;
128 #define MMC_DISCARD_FEATURE	BIT(0)                  /* CMD38 feature */
129 };
130 
131 struct sd_scr {
132 	unsigned char		sda_vsn;
133 	unsigned char		sda_spec3;
134 	unsigned char		sda_spec4;
135 	unsigned char		sda_specx;
136 	unsigned char		bus_widths;
137 #define SD_SCR_BUS_WIDTH_1	(1<<0)
138 #define SD_SCR_BUS_WIDTH_4	(1<<2)
139 	unsigned char		cmds;
140 #define SD_SCR_CMD20_SUPPORT   (1<<0)
141 #define SD_SCR_CMD23_SUPPORT   (1<<1)
142 #define SD_SCR_CMD48_SUPPORT   (1<<2)
143 #define SD_SCR_CMD58_SUPPORT   (1<<3)
144 };
145 
146 struct sd_ssr {
147 	unsigned int		au;			/* In sectors */
148 	unsigned int		erase_timeout;		/* In milliseconds */
149 	unsigned int		erase_offset;		/* In milliseconds */
150 };
151 
152 struct sd_switch_caps {
153 	unsigned int		hs_max_dtr;
154 	unsigned int		uhs_max_dtr;
155 #define HIGH_SPEED_MAX_DTR	50000000
156 #define UHS_SDR104_MAX_DTR	208000000
157 #define UHS_SDR50_MAX_DTR	100000000
158 #define UHS_DDR50_MAX_DTR	50000000
159 #define UHS_SDR25_MAX_DTR	UHS_DDR50_MAX_DTR
160 #define UHS_SDR12_MAX_DTR	25000000
161 #define DEFAULT_SPEED_MAX_DTR	UHS_SDR12_MAX_DTR
162 	unsigned int		sd3_bus_mode;
163 #define UHS_SDR12_BUS_SPEED	0
164 #define HIGH_SPEED_BUS_SPEED	1
165 #define UHS_SDR25_BUS_SPEED	1
166 #define UHS_SDR50_BUS_SPEED	2
167 #define UHS_SDR104_BUS_SPEED	3
168 #define UHS_DDR50_BUS_SPEED	4
169 
170 #define SD_MODE_HIGH_SPEED	(1 << HIGH_SPEED_BUS_SPEED)
171 #define SD_MODE_UHS_SDR12	(1 << UHS_SDR12_BUS_SPEED)
172 #define SD_MODE_UHS_SDR25	(1 << UHS_SDR25_BUS_SPEED)
173 #define SD_MODE_UHS_SDR50	(1 << UHS_SDR50_BUS_SPEED)
174 #define SD_MODE_UHS_SDR104	(1 << UHS_SDR104_BUS_SPEED)
175 #define SD_MODE_UHS_DDR50	(1 << UHS_DDR50_BUS_SPEED)
176 	unsigned int		sd3_drv_type;
177 #define SD_DRIVER_TYPE_B	0x01
178 #define SD_DRIVER_TYPE_A	0x02
179 #define SD_DRIVER_TYPE_C	0x04
180 #define SD_DRIVER_TYPE_D	0x08
181 	unsigned int		sd3_curr_limit;
182 #define SD_SET_CURRENT_LIMIT_200	0
183 #define SD_SET_CURRENT_LIMIT_400	1
184 #define SD_SET_CURRENT_LIMIT_600	2
185 #define SD_SET_CURRENT_LIMIT_800	3
186 #define SD_SET_CURRENT_NO_CHANGE	(-1)
187 
188 #define SD_MAX_CURRENT_200	(1 << SD_SET_CURRENT_LIMIT_200)
189 #define SD_MAX_CURRENT_400	(1 << SD_SET_CURRENT_LIMIT_400)
190 #define SD_MAX_CURRENT_600	(1 << SD_SET_CURRENT_LIMIT_600)
191 #define SD_MAX_CURRENT_800	(1 << SD_SET_CURRENT_LIMIT_800)
192 };
193 
194 struct sd_ext_reg {
195 	u8			fno;
196 	u8			page;
197 	u16			offset;
198 	u8			rev;
199 	u8			feature_enabled;
200 	u8			feature_support;
201 /* Power Management Function. */
202 #define SD_EXT_POWER_OFF_NOTIFY	(1<<0)
203 #define SD_EXT_POWER_SUSTENANCE	(1<<1)
204 #define SD_EXT_POWER_DOWN_MODE	(1<<2)
205 /* Performance Enhancement Function. */
206 #define SD_EXT_PERF_FX_EVENT	(1<<0)
207 #define SD_EXT_PERF_CARD_MAINT	(1<<1)
208 #define SD_EXT_PERF_HOST_MAINT	(1<<2)
209 #define SD_EXT_PERF_CACHE	(1<<3)
210 #define SD_EXT_PERF_CMD_QUEUE	(1<<4)
211 };
212 
213 struct sdio_cccr {
214 	unsigned int		sdio_vsn;
215 	unsigned int		sd_vsn;
216 	unsigned int		multi_block:1,
217 				low_speed:1,
218 				wide_bus:1,
219 				high_power:1,
220 				high_speed:1,
221 				disable_cd:1,
222 				enable_async_irq:1;
223 };
224 
225 struct sdio_cis {
226 	unsigned short		vendor;
227 	unsigned short		device;
228 	unsigned short		blksize;
229 	unsigned int		max_dtr;
230 };
231 
232 struct mmc_host;
233 struct sdio_func;
234 struct sdio_func_tuple;
235 struct mmc_queue_req;
236 
237 #define SDIO_MAX_FUNCS		7
238 
239 /* The number of MMC physical partitions.  These consist of:
240  * boot partitions (2), general purpose partitions (4) and
241  * RPMB partition (1) in MMC v4.4.
242  */
243 #define MMC_NUM_BOOT_PARTITION	2
244 #define MMC_NUM_GP_PARTITION	4
245 #define MMC_NUM_PHY_PARTITION	7
246 #define MAX_MMC_PART_NAME_LEN	20
247 
248 /*
249  * MMC Physical partitions
250  */
251 struct mmc_part {
252 	u64		size;	/* partition size (in bytes) */
253 	unsigned int	part_cfg;	/* partition type */
254 	char	name[MAX_MMC_PART_NAME_LEN];
255 	bool	force_ro;	/* to make boot parts RO by default */
256 	unsigned int	area_type;
257 #define MMC_BLK_DATA_AREA_MAIN	(1<<0)
258 #define MMC_BLK_DATA_AREA_BOOT	(1<<1)
259 #define MMC_BLK_DATA_AREA_GP	(1<<2)
260 #define MMC_BLK_DATA_AREA_RPMB	(1<<3)
261 
262 	ANDROID_KABI_RESERVE(1);
263 };
264 
265 /*
266  * MMC device
267  */
268 struct mmc_card {
269 	struct mmc_host		*host;		/* the host this device belongs to */
270 	struct device		dev;		/* the device */
271 	u32			ocr;		/* the current OCR setting */
272 	unsigned int		rca;		/* relative card address of device */
273 	unsigned int		type;		/* card type */
274 #define MMC_TYPE_MMC		0		/* MMC card */
275 #define MMC_TYPE_SD		1		/* SD card */
276 #define MMC_TYPE_SDIO		2		/* SDIO card */
277 #define MMC_TYPE_SD_COMBO	3		/* SD combo (IO+mem) card */
278 	unsigned int		state;		/* (our) card state */
279 	unsigned int		quirks; 	/* card quirks */
280 	unsigned int		quirk_max_rate;	/* max rate set by quirks */
281 #define MMC_QUIRK_LENIENT_FN0	(1<<0)		/* allow SDIO FN0 writes outside of the VS CCCR range */
282 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)	/* use func->cur_blksize */
283 						/* for byte mode */
284 #define MMC_QUIRK_NONSTD_SDIO	(1<<2)		/* non-standard SDIO card attached */
285 						/* (missing CIA registers) */
286 #define MMC_QUIRK_NONSTD_FUNC_IF (1<<4)		/* SDIO card has nonstd function interfaces */
287 #define MMC_QUIRK_DISABLE_CD	(1<<5)		/* disconnect CD/DAT[3] resistor */
288 #define MMC_QUIRK_INAND_CMD38	(1<<6)		/* iNAND devices have broken CMD38 */
289 #define MMC_QUIRK_BLK_NO_CMD23	(1<<7)		/* Avoid CMD23 for regular multiblock */
290 #define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8)	/* Avoid sending 512 bytes in */
291 						/* byte mode */
292 #define MMC_QUIRK_LONG_READ_TIME (1<<9)		/* Data read time > CSD says */
293 #define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10)	/* Skip secure for erase/trim */
294 #define MMC_QUIRK_BROKEN_IRQ_POLLING	(1<<11)	/* Polling SDIO_CCCR_INTx could create a fake interrupt */
295 #define MMC_QUIRK_TRIM_BROKEN	(1<<12)		/* Skip trim */
296 #define MMC_QUIRK_BROKEN_HPI	(1<<13)		/* Disable broken HPI support */
297 #define MMC_QUIRK_BROKEN_SD_DISCARD	(1<<14)	/* Disable broken SD discard support */
298 #define MMC_QUIRK_BROKEN_SD_CACHE	(1<<15)	/* Disable broken SD cache support */
299 #define MMC_QUIRK_BROKEN_CACHE_FLUSH	(1<<16)	/* Don't flush cache until the write has occurred */
300 #define MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY	(1<<17) /* Disable broken SD poweroff notify support */
301 #define MMC_QUIRK_NO_UHS_DDR50_TUNING	(1<<18) /* Disable DDR50 tuning */
302 
303 	bool			written_flag;	/* Indicates eMMC has been written since power on */
304 	bool			reenable_cmdq;	/* Re-enable Command Queue */
305 
306 	unsigned int		erase_size;	/* erase size in sectors */
307  	unsigned int		erase_shift;	/* if erase unit is power 2 */
308  	unsigned int		pref_erase;	/* in sectors */
309 	unsigned int		eg_boundary;	/* don't cross erase-group boundaries */
310 	unsigned int		erase_arg;	/* erase / trim / discard */
311  	u8			erased_byte;	/* value of erased bytes */
312 	unsigned int		wp_grp_size;	/* write group size in sectors */
313 
314 	u32			raw_cid[4];	/* raw card CID */
315 	u32			raw_csd[4];	/* raw card CSD */
316 	u32			raw_scr[2];	/* raw card SCR */
317 	u32			raw_ssr[16];	/* raw card SSR */
318 	struct mmc_cid		cid;		/* card identification */
319 	struct mmc_csd		csd;		/* card specific */
320 	struct mmc_ext_csd	ext_csd;	/* mmc v4 extended card specific */
321 	struct sd_scr		scr;		/* extra SD information */
322 	struct sd_ssr		ssr;		/* yet more SD information */
323 	struct sd_switch_caps	sw_caps;	/* switch (CMD6) caps */
324 	struct sd_ext_reg	ext_power;	/* SD extension reg for PM */
325 	struct sd_ext_reg	ext_perf;	/* SD extension reg for PERF */
326 
327 	unsigned int		sdio_funcs;	/* number of SDIO functions */
328 	atomic_t		sdio_funcs_probed; /* number of probed SDIO funcs */
329 	struct sdio_cccr	cccr;		/* common card info */
330 	struct sdio_cis		cis;		/* common tuple info */
331 	struct sdio_func	*sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
332 	struct sdio_func	*sdio_single_irq; /* SDIO function when only one IRQ active */
333 	u8			major_rev;	/* major revision number */
334 	u8			minor_rev;	/* minor revision number */
335 	unsigned		num_info;	/* number of info strings */
336 	const char		**info;		/* info strings */
337 	struct sdio_func_tuple	*tuples;	/* unknown common tuples */
338 
339 	unsigned int		sd_bus_speed;	/* Bus Speed Mode set for the card */
340 	unsigned int		mmc_avail_type;	/* supported device type by both host and card */
341 	unsigned int		drive_strength;	/* for UHS-I, HS200 or HS400 */
342 
343 	struct dentry		*debugfs_root;
344 	struct mmc_part	part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
345 	unsigned int    nr_parts;
346 
347 	struct workqueue_struct *complete_wq;	/* Private workqueue */
348 
349 	ANDROID_KABI_RESERVE(1);
350 	ANDROID_KABI_RESERVE(2);
351 };
352 
mmc_large_sector(struct mmc_card * card)353 static inline bool mmc_large_sector(struct mmc_card *card)
354 {
355 	return card->ext_csd.data_sector_size == 4096;
356 }
357 
mmc_card_enable_async_irq(struct mmc_card * card)358 static inline int mmc_card_enable_async_irq(struct mmc_card *card)
359 {
360 	return card->cccr.enable_async_irq;
361 }
362 
363 bool mmc_card_is_blockaddr(struct mmc_card *card);
364 
365 #define mmc_card_mmc(c)		((c)->type == MMC_TYPE_MMC)
366 #define mmc_card_sd(c)		((c)->type == MMC_TYPE_SD)
367 #define mmc_card_sdio(c)	((c)->type == MMC_TYPE_SDIO)
368 #define mmc_card_sd_combo(c)	((c)->type == MMC_TYPE_SD_COMBO)
369 
370 #endif /* LINUX_MMC_CARD_H */
371