Home
last modified time | relevance | path

Searched refs:second (Results 1 – 25 of 45) sorted by relevance

12

/tools/testing/selftests/bpf/progs/
Dtest_siphash.h51 static inline u64 siphash_2u64(const u64 first, const u64 second, const siphash_key_t *key) in siphash_2u64() argument
58 v3 ^= second; in siphash_2u64()
61 v0 ^= second; in siphash_2u64()
Dtest_tcp_custom_syncookie.c317 u64 first = 0, second; in tcp_prepare_cookie() local
340 second = (u64)seq << 32 | ctx->tcp->source << 16 | ctx->tcp->dest; in tcp_prepare_cookie()
341 hash = siphash_2u64(first, second, &test_key_siphash); in tcp_prepare_cookie()
466 u64 first = 0, second; in tcp_validate_cookie() local
476 second = (u64)seq << 32 | ctx->tcp->source << 16 | ctx->tcp->dest; in tcp_validate_cookie()
477 hash = siphash_2u64(first, second, &test_key_siphash); in tcp_validate_cookie()
/tools/arch/x86/dell-uart-backlight-emulator/
DREADME23 3. A second DB9 serial port, this can e.g. be a USB to serial converter
32 ./dell-uart-backlight-emulator <path-to-/dev/tty*S#-for-second-port>
34 For example when using an USB to serial converter for the second port:
/tools/perf/tests/shell/
Dtest_arm_spe_fork.sh37 echo Log lines after 1 second = $log1
/tools/testing/selftests/firmware/
Dsettings1 # The async firmware timeout is set to 1 second (but ends up being effectively
/tools/memory-model/litmus-tests/
DMP+unlocklockonceonce+fencermbonceonce.litmus7 * first must propagate to each CPU before stores in the second do, even if
DMP+polockmbonce+poacquiresilsil.litmus9 * returns false and the second true, we know that the smp_load_acquire()
DMP+polockonce+poacquiresilsil.litmus8 * first spin_is_locked() returns false and the second true, we know that
DLB+unlocklockonceonce+poacquireonce.litmus7 * in the first must execute before any accesses in the second, even if the
DREADME84 As below, but with the second access of the writer process
95 and the second access of reader process protected by a lock.
144 The second is forbidden because smp_store_release() is
185 left-hand end of the second row of tests on page one of test6.pdf.
214 accesses with descriptions of the second access in the pair.
223 P0()'s second access is a READ_ONCE(), as opposed to (for example)
227 This is related to P0()'s second access by program order ("po"),
/tools/testing/selftests/user_events/
Ddyn_test.c145 static int check_match(int *check, const char *first, const char *second, bool *match) in check_match() argument
156 if (reg_event(fd, check, 30, second) == -1) { in check_match()
/tools/memory-model/Documentation/
Drecipes.txt6 The first section covers simple special cases, the second section
16 second being use of that old concurrency workhorse, locking.
206 outcome in which the first load sees the value written by the second store
207 but the second load does not see the value written by the first store.
354 second, while another CPU loads from the second variable and then stores
475 that one CPU first stores to one variable and then loads from a second,
476 while another CPU stores to the second variable and then loads from the
Dglossary.txt44 there is said to be a coherence link from the second CPU to
124 guarantees the first access precedes the second. For more
144 CPU, there is said to be a reads-from link from the second
Dexplanation.txt137 data from buf into a second private variable r2 for copying to
344 first comes before the second in program order and they access the
431 execution of the second event depends in some way on a value obtained
433 value it obtains must somehow affect what the second event does.
453 accessed by the other event. The second event can be either a read or
462 Here the location accessed by the second READ_ONCE() depends on the
492 between two accesses is purely syntactic if the second access doesn't
503 second access will always be the same, regardless of the value of the
623 overwrites the initial value comes second; the store which overwrites
937 The first and second are quite common; they can be found in many
[all …]
Dlocking.txt138 ordered after the WRITE_ONCE() to "data", solving the second problem.
230 initial value and the second to return the updated value, as shown below:
/tools/testing/selftests/net/packetdrill/
Dtcp_zerocopy_maxfrags.pkt6 // 2) spill over into a second packet with zerocopy,
/tools/perf/scripts/perl/Perf-Trace-Util/
DREADME17 that you want to access - it's passed as the second parameter,
/tools/perf/Documentation/
Dperf-ftrace.txt149 Use nano-second instead of micro-second as a base unit of the histogram.
Dperf-list.txt210 This example measures memory bandwidth every second
225 This example measures the combined core power every second
323 area event must be the leader, so then the second event samples, not the first.
Dperf-script.txt166 second invocation sets the fields to comm,tid,time,ip,sym. In this case a
175 The first -F sets the fields for all events and the second -F
420 Select the second 10% time slice:
426 Select the first and second 10% time slices:
Dperf-diff.txt134 Select the second 10% time slice to diff:
142 Select the first and the second 10% time slices to diff:
Dperf-top.txt328 to first event, second cgroup to second event and so on. It is possible to provide
358 will appear, the first for cycles and the second for the switch-on event.
/tools/kvm/kvm_stat/
Dkvm_stat.txt65 run in batch mode for one second
/tools/testing/selftests/drivers/net/netdevsim/
Ddevlink.sh174 check_region_snapshot_count dummy post-second-snapshot 2
208 check_region_snapshot_count dummy post-second-delete 2
/tools/testing/selftests/net/netfilter/
Dnft_queue.sh321 tcp dport 12345 limit rate 1/second burst 1 packets counter queue num 0
325 tcp dport 12345 limit rate 1/second burst 1 packets counter queue num 0

12