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| /Documentation/devicetree/bindings/mfd/ |
| D | qcom-pm8xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom-pm8xxx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PM8xxx PMIC multi-function devices
10 - Satya Priya <quic_c_skakit@quicinc.com>
19 - enum:
20 - qcom,pm8058
21 - qcom,pm8821
22 - qcom,pm8901
[all …]
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| D | qcom,spmi-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMICs multi-function device
13 16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes
14 each. A function can consume one or more of these fixed-size register regions.
17 PMICs. These PMICs use a "QPNP" scheme through SPMI interface.
18 QPNP is effectively a partitioning scheme for dividing the SPMI extended
24 - Stephen Boyd <sboyd@kernel.org>
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| D | kontron,sl28cpld.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Walle <michael@walle.cc>
14 watchdog, fan monitoring, PWM controller, interrupt controller and a
24 maxItems: 1
26 "#address-cells":
27 const: 1
29 "#size-cells":
32 "#interrupt-cells":
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| D | aspeed,ast2x00-scu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Joel Stanley <joel@jms.id.au>
15 - Andrew Jeffery <andrew@aj.id.au>
20 - enum:
21 - aspeed,ast2400-scu
22 - aspeed,ast2500-scu
23 - aspeed,ast2600-scu
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| D | atmel,sama5d2-flexcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/atmel,sama5d2-flexcom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
13 The Microchip Flexcom is just a wrapper which embeds a SPI controller,
14 an I2C controller and an USART. Only one function can be used at a
20 - const: atmel,sama5d2-flexcom
21 - items:
22 - const: microchip,sam9x7-flexcom
[all …]
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| D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
18 The switch family is a multi-port networking switch that supports many
25 - mscc,vsc7512
28 maxItems: 1
30 "#address-cells":
31 const: 1
[all …]
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| D | xylon,logicvc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Xylon LogiCVC multi-function device
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 The LogiCVC is a display controller that also contains a GPIO controller.
15 As a result, a multi-function device is exposed as parent of the display
21 - enum:
22 - xylon,logicvc-3.02.a
23 - const: syscon
[all …]
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| D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
18 (typically in a Baseboard Management Controller SoC), but under certain
21 The LPC controller is represented as a multi-function device to account for the
[all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra210-ahub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
26 - enum:
[all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | usb-device.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-device.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
17 Four types of device-tree nodes are defined: "host-controller nodes"
22 A combined node shall be used instead of a device node and an interface node
23 for devices of class 0 or 9 (hub) with a single configuration and a single
26 A "hub node" is a combined node or an interface node that represents a USB
[all …]
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| /Documentation/devicetree/bindings/soundwire/ |
| D | soundwire-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soundwire/soundwire-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Vinod Koul <vkoul@kernel.org>
14 SoundWire busses can be described with a node for the SoundWire controller
15 device and a set of child nodes for each SoundWire slave on the bus.
21 "#address-cells":
24 "#size-cells":
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| /Documentation/devicetree/bindings/display/msm/ |
| D | qcom,mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
23 - qcom,mdss
29 reg-names:
32 - const: mdss_phys
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| D | dpu-common.yaml | 2 ---
3 $id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Krishna Manikandan <quic_mkrishn@quicinc.com>
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
17 # display-controller@ nodes
23 pattern: '^display-controller@[0-9a-f]+$'
26 maxItems: 1
28 power-domains:
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| /Documentation/devicetree/bindings/slimbus/ |
| D | slimbus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 SLIMbus is a 2-wire bus, and is used to communicate with peripheral
14 components like audio-codec.
18 pattern: "^slim(@.*|-([0-9]|[1-9][0-9]+))?$"
20 "#address-cells":
23 "#size-cells":
27 "^.*@[0-9a-f]+,[0-9a-f]+$":
[all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | awinic,aw200xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Kurbanov <mmkurbanov@sberdevices.ru>
13 It is a matrix LED driver programmed via an I2C interface. Devices have
14 a set of individually controlled leds and support 3 pattern controllers
16 - AW20036 (3x12) 36 LEDs
17 - AW20054 (6x9) 54 LEDs
18 - AW20072 (6x12) 72 LEDs
19 - AW20108 (9x12) 108 LEDs
[all …]
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,geni-se.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 is a programmable module for supporting a wide range of serial interfaces
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
17 Wrapper controller is modeled as a node with zero or more child nodes each
18 representing a serial engine.
23 - qcom,geni-se-qup
[all …]
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| /Documentation/trace/postprocess/ |
| D | decode_msr.py | 3 # decode_msr msr-index.h < trace
9 with open(sys.argv[1] if len(sys.argv) > 1 else "msr-index.h", "r") as f:
10 for j in f:
11 m = re.match(r'#define (MSR_\w+)\s+(0x[0-9a-fA-F]+)', j)
13 msrs[int(m.group(2), 16)] = m.group(1)
22 m = re.search(r'(read|write)_msr:\s+([0-9a-f]+)', j)
30 if er[1] <= num <= er[2]:
31 r = er[0] % (num - er[1],)
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | ti,j721e-system-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 System controller node represents a register region containing a set
14 represent as any specific type of device. The typical use-case is
15 for some other node's driver, or platform-specific code, to acquire
16 a reference to the syscon node (e.g. by phandle, node path, or
17 search using a specific compatible value), interrogate the node (or
[all …]
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,imx-weim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
16 wireless and mobile applications that use low-power technology. The actual
17 devices are instantiated from the child nodes of a WEIM node.
21 pattern: "^memory-controller@[0-9a-f]+$"
25 - enum:
[all …]
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr4.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"
19 - const: jedec,lpddr4
22 - compatible
[all …]
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| /Documentation/ABI/stable/ |
| D | sysfs-class-tpm | 4 Contact: linux-integrity@vger.kernel.org
5 Description: The device/ directory under a specific TPM instance exposes
12 Contact: linux-integrity@vger.kernel.org
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
24 Contact: linux-integrity@vger.kernel.org
32 Contact: linux-integrity@vger.kernel.org
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
49 Contact: linux-integrity@vger.kernel.org
[all …]
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| /Documentation/devicetree/bindings/fsi/ |
| D | fsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/fsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
13 FSI (FRU (Field Replaceable Unit) Service Interface) is a two wire bus. The
14 FSI bus is connected to a CFAM (Common FRU Access Macro) which contains
18 "#address-cells":
21 "#size-cells":
24 '#interrupt-cells':
[all …]
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| /Documentation/userspace-api/ioctl/ |
| D | ioctl-number.rst | 21 system calls 'write' and 'read'. For example, a SET_FOO ioctl would
23 a GET_FOO ioctl would be _IOR, although the kernel would actually write
28 many drivers share a partial letter with other drivers.
30 If you are writing a driver for a new device and need a letter, pick an
33 patch to Linus Torvalds. Or you can e-mail me at <mec@shout.net> and
36 The second argument to _IO, _IOW, _IOR, or _IOWR is a sequence number
49 (1) Keeping the ioctl's globally unique helps error checking:
50 if a program calls an ioctl on the wrong device, it will get an
67 no attempt to list non-X86 architectures or ioctls from drivers/staging/.
73 0x00 00-1F linux/fs.h conflict!
[all …]
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| /Documentation/devicetree/bindings/soc/samsung/ |
| D | exynos-usi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
[all …]
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| /Documentation/devicetree/bindings/bus/ |
| D | allwinner,sun50i-a64-de2.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 pattern: "^bus(@[0-9a-f]+)?$"
17 "#address-cells":
18 const: 1
20 "#size-cells":
[all …]
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