Searched full:asic (Results 1 – 25 of 42) sorted by relevance
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| /Documentation/networking/devlink/ |
| D | ionic.rst | 24 * - ``asic.id``
26 - The ASIC type for this device
27 * - ``asic.rev``
29 - The revision of the ASIC for this device
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| D | bnxt.rst | 59 * - ``asic.id``
61 - ASIC design identifier
62 * - ``asic.rev``
64 - ASIC design revision
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| D | devlink-dpipe.rst | 17 API (DPIPE) is aimed at providing the user visibility into the ASIC's
27 control path of the whole networking stack to a switch ASIC. Due to
78 ASIC. Thus it is tied to the top of the ``devlink`` infrastructure.
111 and specific ASIC metadata. The protocol headers should be declared in the
112 ``devlink`` core API. On the other hand ASIC meta data is driver specific
117 In order to provide further visibility some ASIC metadata fields could be
162 Mellanox Spectrum ASIC. The blocks are described in the order they appear in
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| D | devlink-info.rst | 32 This is usually the serial number of the ASIC, also often available
134 asic.id
137 ASIC design identifier.
139 asic.rev
142 ASIC design revision/stepping.
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| D | devlink-linecard.rst | 21 the switch ASIC modules and physical front panel ports.
36 - Device driver would instruct the ASIC to prepare all
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| D | devlink-eswitch-attr.rst | 14 rules and logic can be offloaded to the hardware switch ASIC. It enables
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| D | devlink-resource.rst | 38 - A limited capacity of physical ports that the switch ASIC can support
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| /Documentation/networking/device_drivers/ethernet/amd/ |
| D | pds_core.rst | 37 asic.id 0x0
38 asic.rev 0x0
69 * - ``asic.id``
71 - The ASIC type for this device
72 * - ``asic.rev``
74 - The revision of the ASIC for this device
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-habanalabs | 25 only for the Gaudi ASIC family
32 This property is valid only for the Gaudi ASIC family
99 This property is valid only for the Goya ASIC family
111 Goya ASIC family
118 fabric. This property is valid only for the Goya ASIC family
143 Goya ASIC family
150 engine. This property is valid only for the Goya ASIC family
183 the Goya ASIC family
246 Goya ASIC family
253 engines. This property is valid only for the Goya ASIC family
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| D | sysfs-firmware-sgi_uv | 77 "UVHub x.x" = A 'node' ASIC, connecting a CPU to the interconnect
78 fabric. The 'x.x' value represents the ASIC revision.
81 "NLxRouter" = A 'router ASIC, only connecting other ASICs to
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| /Documentation/userspace-api/media/v4l/ |
| D | dev-touch.rst | 19 some systems, this may be performed on the ASIC and the raw data is purely a
20 side-channel for diagnostics or tuning. In other systems, the ASIC is a simple
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| /Documentation/ABI/stable/ |
| D | sysfs-driver-mlxreg-io | 5 Description: This file shows ASIC health status. The possible values are:
6 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
94 auxiliary outage or power refresh, ASIC thermal shutdown, halt,
140 Factor mezzanine, reset requested from ASIC, reset caused by BIOS
177 Description: This file allows to retain ASIC up during PCIe root complex
297 Description: These files clear line card reset bit enforced by ASIC, when it
298 sets it due to some abnormal ASIC behavior.
352 Description: This file allows to unlock ASIC after thermal shutdown event.
353 When system thermal shutdown is enforced by ASIC, ASIC is
362 ASIC from locking - is full system power cycle through the
[all …]
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| /Documentation/devicetree/bindings/ata/ |
| D | mediatek,mtk-ahci.yaml | 38 - const: asic
88 clock-names = "ahb", "axi", "asic", "rbc", "pm";
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| D | rockchip,dwc-ahci.yaml | 79 - const: asic
111 clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
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| D | snps,dwc-ahci-common.yaml | 52 const: asic
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| /Documentation/devicetree/bindings/net/ |
| D | ibm,emac.txt | 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
29 ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
170 "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
190 "ibm,zmii-CHIP" where CHIP is the host ASIC (like
199 "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
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| /Documentation/devicetree/bindings/arc/ |
| D | eznps.txt | 4 Appliance main board with NPS400 ASIC.
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| /Documentation/devicetree/bindings/mfd/ |
| D | retu.txt | 10 - reg: Specifies the CBUS slave address of the ASIC chip
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| D | mfd.txt | 8 - A mixed signal ASIC on an external bus, sometimes a PMIC (Power Management
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| /Documentation/gpu/amdgpu/display/ |
| D | mpo-overview.rst | 217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
221 on an ASIC that only supports three pipes. We can have:
238 .. note:: These scaling limitations might vary from ASIC to ASIC.
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| D | dc-glossary.rst | 18 ASIC
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| /Documentation/scsi/ |
| D | aic79xx.rst | 26 Ultra320 ASIC Description
29 Ultra320 SCSI ASIC
31 Ultra320 SCSI ASIC with Retained Training
33 Ultra320 SCSI ASIC
35 Ultra320 SCSI ASIC with Retained Training
39 Ultra320 Adapters Description ASIC
53 AIC-7902B ASIC
207 - Retained Training Information (Rev B. ASIC only)
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,integrator.yaml | 25 expansion modules, it is referred to as an "ASIC Development
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| /Documentation/gpu/amdgpu/ |
| D | driver-misc.rst | 59 :file: ./apu-asic-info-table.csv
67 :file: ./dgpu-asic-info-table.csv
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| /Documentation/devicetree/bindings/spi/ |
| D | nuvoton,npcm-fiu.txt | 28 - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
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