Searched full:architecture (Results 1 – 25 of 448) sorted by relevance
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| /Documentation/arch/powerpc/ |
| D | isa-versions.rst | 10 CPU Architecture version
24 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
25 - PowerPC Virtual Environment Architecture Book II v2.02
26 - PowerPC Operating Environment Architecture Book III v2.02
27 PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
28 - PowerPC Virtual Environment Architecture Book II v2.01
29 - PowerPC Operating Environment Architecture Book III v2.01
31 Power4+ - PowerPC User Instruction Set Architecture Book I v2.01
32 - PowerPC Virtual Environment Architecture Book II v2.01
33 - PowerPC Operating Environment Architecture Book III v2.01
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| D | elf_hwcaps.rst | 67 HWCAPs are allocated as described in Power Architecture 64-Bit ELF V2 ABI
131 The processor implements the embedded category ("BookE") architecture.
147 The processor supports the v2.05 userlevel architecture. Processors
160 The processor supports the v2.06 userlevel architecture. Processors
182 The processor supports the v2.07 userlevel architecture. Processors
209 The processor supports the v3.0B / v3.0C userlevel architecture. Processors
228 The processor supports the v3.1 userlevel architecture. Processors
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| D | associativity.rst | 17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
57 "ibm,architecture-vec-5" property.
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| /Documentation/features/ |
| D | arch-support.txt | 2 For generic kernel features that need architecture support, the
8 | ok | # feature supported by the architecture
9 |TODO| # feature not yet supported by the architecture
11 | N/A| # feature doesn't apply to the architecture
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| D | list-arch.sh | 4 # of an architecture.
6 # (If no arguments are given then it will print the host architecture's status.)
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | cpus.txt | 2 Power Architecture CPU Binding
5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
17 Freescale Power Architecture) defines the architecture for Freescale
18 Power CPUs. The EREF defines some architecture categories not defined
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| /Documentation/admin-guide/ |
| D | kernel-parameters.rst | 104 ARM ARM architecture is enabled.
105 ARM64 ARM64 architecture is enabled.
121 IMA Integrity measurement architecture is enabled.
131 LOONGARCH LoongArch architecture is enabled.
134 M68k M68k architecture is enabled.
138 MIPS MIPS architecture is enabled.
146 PARISC The PA-RISC architecture is enabled.
151 PPC PowerPC architecture is enabled.
157 RISCV RISCV architecture is enabled.
158 S390 S390 architecture is enabled.
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| /Documentation/core-api/irq/ |
| D | irqflags-tracing.rst | 15 CONFIG_PROVE_RWSEM_LOCKING will be offered on an architecture - these
19 Architecture support for this is certainly not in the "trivial"
21 state changes. But an architecture can be irq-flags-tracing enabled in a
42 - if the architecture has non-maskable interrupts then those need to be
47 implementation in an architecture: lockdep will detect that and will
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| /Documentation/virt/kvm/x86/ |
| D | hypercalls.rst | 45 2. Architecture(s)
52 :Architecture: x86
60 :Architecture: x86
68 :Architecture: PPC
79 :Architecture: PPC
89 :Architecture: x86
105 :Architecture: x86
143 :Architecture: x86
164 :Architecture: x86
175 :Architecture: x86
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| /Documentation/mm/ |
| D | memory-model.rst | 16 FLATMEM and SPARSEMEM. Each architecture defines what
43 To allocate the `mem_map` array, architecture specific setup code should
48 An architecture may free parts of the `mem_map` array that do not cover the
49 actual physical pages. In such case, the architecture specific
75 `MAX_PHYSMEM_BITS` constants defined by each architecture that
77 physical address that an architecture supports, the
100 The architecture setup code should call sparse_init() to
119 To use vmemmap, an architecture has to reserve a range of virtual
122 the architecture should implement :c:func:`vmemmap_populate` method
124 virtual memory map. If an architecture does not have any special
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| D | page_tables.rst | 17 height. The architecture code for each supported architecture will then
90 The architecture defines the size and contents of `pteval_t`.
94 architecture-specific bits such as memory protection.
127 pointers on each level is architecture-defined.::
146 If the architecture does not use all the page table levels, they can be *folded*
151 Page table handling code that wishes to be architecture-neutral, such as the
154 architecture-specific code, so as to be robust to future changes.
227 The first steps are architecture dependent. Most architectures jump to
273 characteristics of each architecture, while still sharing a common overall
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| /Documentation/ABI/stable/ |
| D | syscalls | 7 Note that this interface is different for every architecture
8 that Linux supports. Please see the architecture-specific
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| D | sysfs-devices-system-cpu | 29 socket number, but the actual value is architecture and platform
36 architecture and platform dependent.
42 architecture and platform dependent.
48 architecture and platform dependent.
54 architecture and platform dependent. it's only used on s390.
60 architecture and platform dependent. it's only used on s390.
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| /Documentation/arch/x86/x86_64/ |
| D | machinecheck.rst | 29 For more details about the x86 machine check architecture
30 see the Intel and AMD architecture manuals from their developer websites.
32 For more details about the architecture
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| D | fred.rst | 10 The FRED architecture defines simple new transitions that change
11 privilege level (ring transitions). The FRED architecture was
23 The new transitions defined by the FRED architecture are FRED event
31 In addition to these transitions, the FRED architecture defines a new
36 Furthermore, the FRED architecture is easy to extend for future CPU
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| /Documentation/arch/arm64/ |
| D | amu.rst | 15 Architecture overview
19 ARMv8.4 CPU architecture.
26 Version 1 of the Activity Monitors architecture implements a counter group
39 The Activity Monitors architecture provides space for up to 16 architected
40 event counters. Future versions of the architecture may use this space to
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| D | legacy_instructions.rst | 7 the architecture. The infrastructure code uses undefined instruction
19 have been obsoleted in the architecture, e.g., SWP
39 architecture. Deprecated instructions should default to emulation
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| /Documentation/timers/ |
| D | highres.rst | 48 code out of the architecture-specific areas into a generic management
49 framework, as illustrated in figure #3 (OLS slides p. 18). The architecture
76 for various event driven functionalities is hardwired into the architecture
80 architecture. Another implication of the current design is that it is necessary
81 to touch all the architecture-specific implementations in order to provide new
87 to minimize the clock event related architecture dependent code to the pure
93 Clock event devices are registered either by the architecture dependent boot
116 architecture specific timer interrupt handlers and hands the control over the
131 The conversion of an architecture has no functional impact, but allows to
135 adding the kernel/time/Kconfig file to the architecture specific Kconfig and
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| /Documentation/usb/ |
| D | linux.inf | 19 ; Decoration for x86 architecture
23 ; Decoration for x64 architecture
27 ; Decoration for ia64 architecture
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| /Documentation/scheduler/ |
| D | membarrier.rst | 7 MEMBARRIER_CMD_{PRIVATE,GLOBAL}_EXPEDITED - Architecture requirements
14 require each architecture to have a full memory barrier after coming from
24 require each architecture to have a full memory barrier after updating rq->curr,
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| /Documentation/devicetree/bindings/phy/ |
| D | realtek,usb2phy.yaml | 20 The USB architecture includes three XHCI controllers.
30 The USB architecture includes two XHCI controllers.
38 The USB architecture includes three XHCI controllers.
46 The USB architecture includes three XHCI controllers.
54 The USB architecture includes three XHCI controllers.
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| /Documentation/arch/arm/samsung/ |
| D | gpio.rst | 8 This outlines the Samsung GPIO implementation and the architecture
25 Pin configuration is specific to the Samsung architecture, with each SoC
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| /Documentation/arch/nios2/ |
| D | nios2.rst | 2 Linux on the Nios II architecture
17 Nios II is a 32-bit embedded-processor architecture designed specifically for the
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| /Documentation/devicetree/bindings/watchdog/ |
| D | arm,sbsa-gwdt.yaml | 7 title: SBSA (Server Base System Architecture) Generic Watchdog
16 Architecture (SBSA)
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| /Documentation/devicetree/bindings/nvmem/ |
| D | fsl,layerscape-sfp.yaml | 23 - description: Trust architecture 2.1 SFP
26 - description: Trust architecture 3.0 SFP
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