Searched +full:msb +full:- +full:- (Results 1 – 25 of 58) sorted by relevance
123
| /Documentation/sound/soc/ |
| D | dai.rst | 35 I2S has several different operating modes:-
38 MSB is transmitted on the falling edge of the first BCLK after LRC
42 MSB is transmitted on transition of LRC.
45 MSB is transmitted sample size BCLKs before LRC transition.
58 Common PCM operating modes:-
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
64 MSB is transmitted on rising edge of FRAME/SYNC.
|
| /Documentation/devicetree/bindings/gpio/ |
| D | netxbig-gpio-ext.txt | 5 - compatible: "lacie,netxbig-gpio-ext".
6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
8 - enable-gpio: latches the new configuration (address, data) on raising edge.
12 netxbig_gpio_ext: netxbig-gpio-ext {
13 compatible = "lacie,netxbig-gpio-ext";
15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
21 enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
|
| /Documentation/hwmon/ |
| D | smsc47b397.rst | 6 * SMSC LPC47B397-NC
8 * SMSC SCH5307-NS
20 - Mark M. Hoffman <mhoffman@lightlink.com>
21 - Utilitek Systems, Inc.
25 The following specification describes the SMSC LPC47B397-NC [1]_ sensor chip
27 provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected
30 .. [1] And SMSC SCH5307-NS and SCH5317, which have different device IDs but are
33 -------------------------------------------------------------------------
36 -------------------------------------------------------------------------
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
[all …]
|
| /Documentation/ABI/testing/ |
| D | sysfs-bus-usb-devices-usbsevseg | 6 A value of 0 is off and a non-zero value is on.
16 MSB 0x06; LSB 0x3F, and
20 MSB 0x08; LSB 0xFF.
28 hex: each character is between 0-15
29 ascii: each character is between '0'-'9' and 'A'-'F'.
|
| /Documentation/usb/ |
| D | misc_usbsevseg.rst | 2 USB 7-Segment Numeric Display
8 ------------------
16 ------------
20 MSB 0x06; LSB 0x3f
24 MSB 0x08; LSB 0xff
28 hex expects a value between 0-15 per character,
29 ascii expects a value between '0'-'9' and 'A'-'F'.
33 ----------------
44 echo -ne "\x01\x02\x03" > /sys/bus/usb/.../text (hex)
|
| /Documentation/devicetree/bindings/input/ |
| D | gpio-decoder.txt | 4 - compatible: should be "gpio-decoder"
5 - gpios: a spec of gpios (at least two) to be decoded to a number with
6 first entry representing the MSB.
9 - decoder-max-value: Maximum possible value that can be reported by
11 - linux,axis: the input subsystem axis to map to (ABS_X/ABS_Y).
15 gpio-decoder0 {
16 compatible = "gpio-decoder";
22 decoder-max-value = <9>;
|
| /Documentation/input/devices/ |
| D | iforce-protocol.rst | 7 Home page at `<http://web.archive.org/web/*/http://www.esil.univ-mrs.fr>`_
16 specify force effects to I-Force 2.0 devices. None of this information comes
25 send data to your I-Force device based on what you read in this document.
30 All values are hexadecimal with big-endian encoding (msb on the left). Beware,
31 values inside packets are encoded using little-endian. Bytes whose roles are
35 ------------------------
64 00 X-Axis lsb
65 01 X-Axis msb
66 02 Y-Axis lsb, or gas pedal for a wheel
67 03 Y-Axis msb, or brake pedal for a wheel
[all …]
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | gpio-fan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwmon/gpio-fan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 const: gpio-fan
19 ordered MSB-->LSB.
23 alarm-gpios:
26 gpio-fan,speed-map:
27 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| /Documentation/devicetree/bindings/thermal/ |
| D | armada-thermal.txt | 5 - compatible: Should be set to one of the following:
6 * marvell,armada370-thermal
7 * marvell,armada375-thermal
8 * marvell,armada380-thermal
9 * marvell,armadaxp-thermal
10 * marvell,armada-ap806-thermal
11 * marvell,armada-ap807-thermal
12 * marvell,armada-cp110-thermal
16 Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt
17 Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
[all …]
|
| /Documentation/driver-api/nfc/ |
| D | nfc-pn544.rst | 7 -------
16 ---------
29 checksum. Firmware update messages have the length in the second (MSB)
|
| /Documentation/devicetree/bindings/sound/ |
| D | fsl,sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
[all …]
|
| D | qcom,q6dsp-lpass-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 - qcom,q6afe-dais
20 '#sound-dai-cells':
23 '#address-cells':
26 '#size-cells':
31 '^dai@[0-9]+$':
[all …]
|
| D | audio-graph-port.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
17 - $ref: /schemas/graph.yaml#/$defs/port-base
18 - $ref: /schemas/sound/dai-params.yaml#
20 mclk-fs:
21 $ref: simple-card.yaml#/definitions/mclk-fs
[all …]
|
| /Documentation/devicetree/bindings/bus/ |
| D | brcm,gisb-arb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
15 - items:
16 - enum:
17 - brcm,bcm7445-gisb-arb # for other 28nm chips
18 - const: brcm,gisb-arb
19 - items:
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,vic.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,vic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 be nested or have the outputs wire-OR'd together.
18 - $ref: /schemas/interrupt-controller.yaml#
23 - arm,pl190-vic
24 - arm,pl192-vic
25 - arm,versatile-vic
[all …]
|
| /Documentation/devicetree/bindings/fpga/ |
| D | xlnx,fpga-selectmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Charles Perry <charles.perry@savoirfairelinux.com>
16 the clock, with the MSB of each byte presented to the D0 pin.
22 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
27 - xlnx,fpga-xc7s-selectmap
28 - xlnx,fpga-xc7a-selectmap
29 - xlnx,fpga-xc7k-selectmap
[all …]
|
| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-sliced-vbi-cap.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_SLICED_VBI_CAP - Query sliced VBI capabilities
43 The ``type`` field was added, and the ioctl changed from read-only
44 to write-read, in Linux 2.6.19.
50 .. flat-table:: struct v4l2_sliced_vbi_cap
51 :header-rows: 0
52 :stub-columns: 0
55 * - __u16
56 - ``service_set``
57 - :cspan:`2` A set of all data services supported by the driver.
[all …]
|
| D | vidioc-enumoutput.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_ENUMOUTPUT - Enumerate video outputs
46 .. flat-table:: struct v4l2_output
47 :header-rows: 0
48 :stub-columns: 0
51 * - __u32
52 - ``index``
53 - Identifies the output, set by the application.
54 * - __u8
55 - ``name``\ [32]
[all …]
|
| /Documentation/fb/ |
| D | arkfb.rst | 2 arkfb - fbdev driver for ARK Logic chips
12 - only BIOS initialized VGA devices supported
13 - probably not working on big endian
38 with interleaved planes (1 byte interleave), MSB first. Both modes support
59 * acceleration support (8514-like 2D)
67 --
|
| D | vt8623fb.rst | 2 vt8623fb - fbdev driver for graphics core in VIA VT8623 chipset
12 I tested vt8623fb on VIA EPIA ML-6000
35 with interleaved planes (1 byte interleave), MSB first. Both modes support
54 * acceleration support (8514-like 2D, busmaster transfers)
63 --
|
| D | s3fb.rst | 2 s3fb - fbdev driver for S3 Trio/Virge chips
15 - only PCI bus supported
16 - only BIOS initialized VGA devices supported
17 - probably not working on big endian
39 lower pixclocks (maximum usually between 50-60 MHz, depending on specific
40 hardware, i get best results from plain S3 Trio32 card - about 75 MHz). This
47 with interleaved planes (1 byte interleave), MSB first. Both modes support
70 * acceleration support (8514-like 2D, Virge 3D, busmaster transfers)
81 --
|
| /Documentation/virt/kvm/x86/ |
| D | timekeeping.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
63 -------------- | +->| GATE TIMER 0 |
[all …]
|
| /Documentation/hid/ |
| D | hid-alps.rst | 6 ------------
19 --------------
42 ---------
45 ReportID-1 (Input Reports) (HIDUsage-Mouse) for TP&SP
46 ReportID-2 (Input Reports) (HIDUsage-keyboard) for TP
47 ReportID-3 (Input Reports) (Vendor Usage: Max 10 finger data) for TP
48 ReportID-4 (Input Reports) (Vendor Usage: ON bit data) for GP
49 ReportID-5 (Feature Reports) Feature Reports
50 ReportID-6 (Input Reports) (Vendor Usage: StickPointer data) for SP
51 ReportID-7 (Feature Reports) Flash update (Bootloader)
[all …]
|
| /Documentation/devicetree/bindings/eeprom/ |
| D | at25.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Eggers <ceggers@arri.de>
15 - pattern: "^eeprom@[0-9a-f]{1,2}$"
16 - pattern: "^fram@[0-9a-f]{1,2}$"
26 - items:
27 - enum:
28 - anvo,anv32e61w
29 - atmel,at25256B
[all …]
|
| /Documentation/bpf/ |
| D | classic_vs_extended.rst | 12 - Number of registers increase from 2 to 10:
15 new layout extends this to be 10 internal registers and a read-only frame
16 pointer. Since 64-bit CPUs are passing arguments to functions via registers
17 the number of args from eBPF program to in-kernel function is restricted
18 to 5 and one register is used to accept return value from an in-kernel
20 sparcv9/mips64 have 7 - 8 registers for arguments; x86_64 has 6 callee saved
25 64-bit architectures.
27 On 32-bit architectures JIT may map programs that use only 32-bit arithmetic
30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if
33 call predefined in-kernel functions, though.
[all …]
|
123