Searched +full:pmic +full:- +full:specific (Results 1 – 14 of 14) sorted by relevance
| /Documentation/devicetree/bindings/spmi/ |
| D | hisilicon,hisi-spmi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org> 13 The HiSilicon SPMI BUS controller is found on some Kirin-based designs. 16 The PMIC part is provided by 17 Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml. 20 - $ref: spmi.yaml# 25 pattern: "spmi@[0-9a-f]" [all …]
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| D | spmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 13 The System Power Management (SPMI) controller is a 2-wire bus defined 17 bindings defined here, plus any bus controller specific properties, if 27 "#address-cells": 30 "#size-cells": 34 "@[0-9a-f]$": 35 description: up to 16 child PMIC nodes [all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | hi6421.txt | 1 * HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd. 4 - compatible : One of the following chip-specific strings: 5 "hisilicon,hi6421-pmic"; 6 "hisilicon,hi6421v530-pmic"; 7 - reg : register range space of hi6421; 9 Supported Hi6421 sub-devices include: 12 ------ --------- ------------ ----------- 20 compatible = "hisilicon,hi6421-pmic"; 26 regulator-name = "VOUT0"; 27 regulator-min-microvolt = <2850000>; [all …]
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| D | max77620.txt | 4 ------------------- 5 - compatible: Must be one of 9 - reg: I2C device address. 12 ------------------- 13 - interrupts: The interrupt on the parent the controller is 15 - interrupt-controller: Marks the device node as an interrupt controller. 16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 19 are defined at dt-bindings/mfd/max77620.h. 21 - system-power-controller: Indicates that this PMIC is controlling the [all …]
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| D | wm831x.txt | 7 - compatible : One of the following chip-specific strings: 16 - reg : I2C slave address when connected using I2C, chip select number 19 - gpio-controller : Indicates this device is a GPIO controller. 20 - #gpio-cells : Must be 2. The first cell is the pin number and the 23 - interrupts : The interrupt line the IRQ signal for the device is 26 - interrupt-controller : wm831x devices contain interrupt controllers and 28 - #interrupt-cells: Must be 2. The first cell is the IRQ number, and the 30 ../interrupt-controller/interrupts.txt 32 Optional sub-nodes: 33 - phys : Contains a phandle to the USB PHY. [all …]
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| D | syscon.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 represent as any specific type of device. The typical use-case is 13 for some other node's driver, or platform-specific code, to acquire 15 search using a specific compatible value), interrogate the node (or 20 - Lee Jones <lee@kernel.org> 30 - al,alpine-sysfabric-servic 31 - allwinner,sun8i-a83t-system-controller 32 - allwinner,sun8i-h3-system-controller [all …]
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| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 8 ("wakeup-source") to handle the specific use-case found 9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104 10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip 12 to the SoC but to a PMIC. It allows the device to be powered up when 14 get access to the 'wakealarm' sysfs entry, this specific property can 20 - "compatible": must be "isil,isl12057" 21 - "reg": I2C bus address of the device 25 - "wakeup-source": mark the chip as a wakeup source, independently of 38 that the pinctrl-related properties below are given for completeness and 41 "interrupt-parent" and "interrupts" are usually sufficient): [all …]
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | qcom,spmi-vadc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm's SPMI PMIC ADC 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 14 SPMI PMIC voltage ADC (VADC) provides interface to clients to read 15 voltage. The VADC is a 15-bit sigma-delta ADC. 17 voltage. The VADC is a 16-bit sigma-delta ADC. [all …]
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| D | qcom,pm8018-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 19 - qcom,pm8018-adc 20 - qcom,pm8038-adc 21 - qcom,pm8058-adc 22 - qcom,pm8921-adc 27 ADC base address in the PMIC, typically 0x197. [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-palmas.txt | 7 - compatible: It must be one of following: 8 - "ti,palmas-pinctrl" for Palma series of the pincontrol. 9 - "ti,tps65913-pinctrl" for Palma series device TPS65913. 10 - "ti,tps80036-pinctrl" for Palma series device TPS80036. 12 Please refer to pinctrl-bindings.txt in this directory for details of the 19 those pin(s), and various pin configuration parameters, such as pull-up, 32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode. 35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode. 38 - ti,palmas-override-powerhold: This is applicable for PMICs for which 40 over DEV_ON bit and keeps the PMIC supplies on even after the DEV_ON [all …]
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | wkup-m3-ipc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dave Gerlach <d-gerlach@ti.com> 11 - Drew Fustini <dfustini@baylibre.com> 14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor 17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver 20 API to allow the SoC PM code to execute specific PM tasks. 29 On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is [all …]
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| /Documentation/driver-api/ |
| D | regulator.rst | 1 .. Copyright 2007-2008 Wolfson Microelectronics 30 -------- 52 Power Management Integrated Circuit (PMIC) 55 subsystems. In an embedded system the primary PMIC is often equivalent 62 drivers use `get <#API-regulator-get>`__ and 63 `put <#API-regulator-put>`__ operations to acquire and release 64 regulators. Functions are provided to `enable <#API-regulator-enable>`__ 65 and `disable <#API-regulator-disable>`__ the regulator and to get and 76 ---------------------- 90 ------------- [all …]
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| /Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/trivial-devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 17 If a device needs more specific bindings, such as properties to 18 describe some aspect of it, there needs to be a specific binding 27 spi-max-frequency: true 32 - enum: 34 - acbel,fsg032 [all …]
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| /Documentation/power/regulator/ |
| D | overview.rst | 26 - Regulator 27 - Electronic device that supplies power to other devices. 31 Input Voltage -> Regulator -> Output Voltage 34 - PMIC 35 - Power Management IC. An IC that contains numerous 39 - Consumer 40 - Electronic device that is supplied power by a regulator. 41 Consumers can be classified into two types:- 52 - Power Domain 53 - Electronic circuit that is supplied its input power by the [all …]
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