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/Documentation/admin-guide/blockdev/
Dramdisk.rst2 Using the RAM disk block device with Linux
10 4) An Example of Creating a Compressed RAM Disk
16 The RAM disk driver is a way to use main system memory as a block device. It
22 The RAM disk dynamically grows as more space is required. It does this by using
23 RAM from the buffer cache. The driver marks the buffers it is using as dirty
26 The RAM disk supports up to 16 RAM disks by default, and can be reconfigured
27 to support an unlimited number of RAM disks (at your own risk). Just change
31 To use RAM disk support with your system, run './MAKEDEV ram' from the /dev
32 directory. RAM disks are all major number 1, and start with minor number 0
35 The new RAM disk also has the ability to load compressed RAM disk images,
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/Documentation/devicetree/bindings/net/
Ddavinci_emac.txt12 - ti,davinci-ctrl-ram-offset: offset to control module ram
13 - ti,davinci-ctrl-ram-size: size of control module ram
24 - ti,davinci-no-bd-ram: boolean, does EMAC have BD RAM?
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
/Documentation/translations/zh_TW/arch/arm/
DBooting40 1、設置和初始化 RAM
47 1、設置和初始化 RAM
53 引導裝載程序應該找到並初始化系統中所有內核用於保持系統變量數據的 RAM
55 RAM,或可能使用對這個設備已知的 RAM 信息,還可能使用任何引導裝載程序
117 標籤列表應該保存在系統的 RAM 中。
120 建議放在 RAM 的頭 16KiB 中。
126 RAM 中,並用啓動數據初始化它。dtb 格式在文檔
132 dtb 必須置於內核自解壓不會覆蓋的內存區。建議將其放置於 RAM 的頭 16KiB
146 zImage 也可以被放在系統 RAM(任意位置)中被調用。注意:內核使用映像
147 基地址的前 16KB RAM 空間來保存頁表。建議將映像置於 RAM 的 32KB 處。
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/Documentation/translations/zh_CN/arch/arm/
DBooting40 1、设置和初始化 RAM
47 1、设置和初始化 RAM
53 引导装载程序应该找到并初始化系统中所有内核用于保持系统变量数据的 RAM
55 RAM,或可能使用对这个设备已知的 RAM 信息,还可能使用任何引导装载程序
117 标签列表应该保存在系统的 RAM 中。
120 建议放在 RAM 的头 16KiB 中。
126 RAM 中,并用启动数据初始化它。dtb 格式在文档
132 dtb 必须置于内核自解压不会覆盖的内存区。建议将其放置于 RAM 的头 16KiB
146 zImage 也可以被放在系统 RAM(任意位置)中被调用。注意:内核使用映像
147 基地址的前 16KB RAM 空间来保存页表。建议将映像置于 RAM 的 32KB 处。
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/Documentation/devicetree/bindings/net/can/
Dbosch,m_can.yaml24 - description: message RAM
55 Message RAM configuration data.
56 Multiple M_CAN instances can share the same Message RAM
58 in Message RAM is also configurable, so this property is
59 telling driver how the shared or private Message RAM are
64 The 'offset' is an address offset of the Message RAM where
66 0x0 if you're using a private Message RAM. The remain cells
78 Please refer to 2.4.1 Message RAM Configuration in Bosch
82 - description: The 'offset' is an address offset of the Message RAM where
84 you're using a private Message RAM.
Dti_hecc.txt9 - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
11 - reg-names :"hecc", "hecc-ram", "mbx"
29 reg-names = "hecc", "hecc-ram", "mbx";
/Documentation/arch/arm/
Dporting.rst25 to be located in RAM, it can be in flash or other read-only or
30 This must be pointing at RAM. The decompressor will zero initialise
43 Physical address to place the initial RAM disk. Only relevant if
48 Virtual address of the initial RAM disk. The following constraint
62 Physical start address of the first bank of RAM.
65 Virtual start address of the first bank of RAM. During the kernel
101 last virtual RAM address (found using variable high_memory).
105 between virtual RAM and the vmalloc area. We do this to allow
113 `pram` specifies the physical start address of RAM. Must always
Dbooting.rst19 1. Setup and initialise the RAM.
27 1. Setup and initialise RAM
35 The boot loader is expected to find and initialise all RAM that the
38 to automatically locate and size all RAM, or it may use knowledge of
39 the RAM in the machine, or any other method the boot loader designer
120 The tagged list should be stored in system RAM.
124 it. The recommended placement is in the first 16KiB of RAM.
129 The boot loader must load a device tree image (dtb) into system ram
142 A safe location is just above the 128MiB boundary from start of RAM.
158 be loaded just above the 128MiB boundary from the start of RAM as
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Dtcm.rst8 This is usually just a few (4-64) KiB of RAM inside the ARM
32 place you put it, it will mask any underlying RAM from the
33 CPU so it is usually wise not to overlap any physical RAM with
55 - Idle loops where all external RAM is set to self-refresh
56 retention mode, so only on-chip RAM is accessible by
61 the external RAM controller.
72 - Have the remaining TCM RAM added to a special
138 printk("Hello TCM executed from ITCM RAM\n");
/Documentation/ABI/testing/
Dsysfs-bus-coresight-devices-etb1016 Description: (RW) Disables write access to the Trace RAM by stopping the
19 into the Trace RAM following the trigger event is equal to the
26 Description: (Read) Defines the depth, in words, of the trace RAM in powers of
40 Description: (Read) Shows the value held by the ETB RAM Read Pointer register
41 that is used to read entries from the Trace RAM over the APB
49 Description: (Read) Shows the value held by the ETB RAM Write Pointer register
51 the CoreSight bus into the Trace RAM. The value is read directly
Dsysfs-bus-coresight-devices-tmc5 Description: (RW) Disables write access to the Trace RAM by stopping the
14 Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer.
28 Description: (Read) Shows the value held by the TMC RAM Read Pointer register
29 that is used to read entries from the Trace RAM over the APB
37 Description: (Read) Shows the value held by the TMC RAM Write Pointer register
39 the CoreSight bus into the Trace RAM. The value is read directly
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,rpm-master-stats.yaml33 qcom,rpm-msg-ram:
35 description: Phandle to an RPM MSG RAM slice containing the master stats
44 The name of the RPM Master which owns the MSG RAM slice where this
51 - qcom,rpm-msg-ram
60 qcom,rpm-msg-ram = <&apss_master_stats>,
Dqcom,smem.yaml32 qcom,rpm-msg-ram:
82 qcom,rpm-msg-ram = <&rpm_msg_ram>;
93 compatible = "qcom,rpm-msg-ram";
/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,mpm.yaml31 Specifies the base address and size of vMPM registers in RPM MSG RAM.
34 qcom,rpm-msg-ram:
37 Phandle to the APSS MPM slice of the RPM Message RAM
82 - qcom,rpm-msg-ram
97 qcom,rpm-msg-ram = <&rpm_msg_ram>;
103 qcom,rpm-msg-ram = <&apss_mpm>;
/Documentation/devicetree/bindings/cache/
Dbaikal,bt1-l2-ctl.yaml16 to change the Tag, Data and Way-select RAM access latencies. Baikal-T1
29 description: Cycles of latency for Way-select RAM accesses
36 description: Cycles of latency for Tag RAM accesses
43 description: Cycles of latency for Data RAM accesses
/Documentation/admin-guide/
Dinitrd.rst1 Using the initial RAM disk (initrd)
8 initrd provides the capability to load a RAM disk by the boot loader.
9 This RAM disk can then be mounted as the root file system and programs
27 1) the boot loader loads the kernel and the initial RAM disk
28 2) the kernel converts initrd into a "normal" RAM disk and
58 Loads the specified file as the initial RAM disk. When using LILO, you
59 have to specify the RAM disk image file in /etc/lilo.conf, using the
64 initrd data is preserved but it is not converted to a RAM disk and
77 with the RAM disk mounted as root.
117 Second, the kernel has to be compiled with RAM disk support and with
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/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-qmss.txt6 processors(PDSP), linking RAM, descriptor pools and infrastructure
12 Linking RAM registers are used to link the descriptors which are stored in
13 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
14 The QMSS driver manages the PDSP setups, linking RAM regions,
24 - linkram0 : <address size> for internal link ram, where size is the total
25 link ram entries.
26 - linkram1 : <address size> for external link ram, where size is the total
27 external link ram entries. If the address is specified as "0"
38 - Queue status RAM.
109 - PDSP internal RAM region.
/Documentation/devicetree/bindings/remoteproc/
Dqcom,glink-rpm-edge.yaml38 qcom,rpm-msg-ram:
41 RPM message memory resource (compatible: qcom,rpm-msg-ram).
78 - qcom,rpm-msg-ram
90 qcom,rpm-msg-ram = <&rpm_msg_ram>;
/Documentation/arch/arm/keystone/
Dknav-qmss.rst12 processors(PDSP), linking RAM, descriptor pools and infrastructure
18 Linking RAM registers are used to link the descriptors which are stored in
19 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
20 The QMSS driver manages the PDSP setups, linking RAM regions,
/Documentation/devicetree/bindings/dma/
Dfsl,imx-sdma.yaml58 fsl,sdma-ram-script-name:
60 description: Should contain the full path of SDMA RAM scripts firmware.
131 description: The phandle to the On-chip RAM (OCRAM) node.
137 - fsl,sdma-ram-script-name
148 fsl,sdma-ram-script-name = "sdma-imx51.bin";
/Documentation/w1/slaves/
Dw1_ds2423.rst20 read sequence of w1_slave file initiates the read of counters and ram
24 value and associated ram buffer is outpputed to own line.
34 - 1 byte from ram page
38 - 31 remaining bytes from the ram page
/Documentation/translations/zh_CN/arch/arm64/
Dbooting.txt47 1、设置和初始化 RAM
53 1、设置和初始化 RAM
58 引导装载程序应该找到并初始化系统中所有内核用于保持系统变量数据的 RAM
60 RAM,或可能使用对这个设备已知的 RAM 信息,还可能是引导装载程序设计者
154 x0 = 系统 RAM 中设备树数据块(dtb)的物理地址。
/Documentation/translations/zh_TW/arch/arm64/
Dbooting.txt51 1、設置和初始化 RAM
57 1、設置和初始化 RAM
62 引導裝載程序應該找到並初始化系統中所有內核用於保持系統變量數據的 RAM
64 RAM,或可能使用對這個設備已知的 RAM 信息,還可能是引導裝載程序設計者
158 x0 = 系統 RAM 中設備樹數據塊(dtb)的物理地址。
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dcpm.txt34 parameter RAM region (if it has one).
36 * Multi-User RAM (MURAM)
38 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
/Documentation/devicetree/bindings/media/
Dallwinner,sun4i-a10-video-engine.yaml38 - description: RAM Clock
44 - const: ram
89 clock-names = "ahb", "mod", "ram";

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